参数资料
型号: MB90347EPFV
元件分类: 微控制器/微处理器
英文描述: MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件页数: 8/84页
文件大小: 1142K
代理商: MB90347EPFV
MB90340E Series
16
(Continued)
Pin No.
Pin name
I/O
Circuit
type*3
Function
QFP100*1 LQFP100*2
86
84
P11
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor. This function is enabled in
single-chip mode.
AD09
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
TOT1
Output pin for the reload timer
87
85
P12
N
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
AD10
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
SIN3
Serial data input pin for UART3
INT11R
External interrupt request input pin
88
86
P13
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
AD11
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
SOT3
Serial data output pin for UART3
89
87
P14
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
AD12
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
SCK3
Clock I/O pin for UART3
90
88
VCC
Power (3.5 V to 5.5 V) input pin
91
89
VSS
GND pin
92
90
X1
A
Main clock output pin
93
91
X0
Main clock input pin
94
92
P15
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
AD13
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
95
93
P16
G
General purpose I/O pin. The register can be set to select
whether to use a pull-up resistor.
This function is enabled in single-chip mode.
AD14
I/O pin for the external address/data bus. This function is
enabled when the external bus is enabled.
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