参数资料
型号: MB90583CPF
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 3,35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
文件页数: 68/112页
文件大小: 2372K
代理商: MB90583CPF
MB90580C Series
DS07-13710-6E
59
11. Delayed Interrupt Generation Module
The delayed interrupt generation module is used to generate the task switching interrupt. Interrupt requests to
the F2MC-16LX CPU can be generated and cleared by software using this module.
(1) Register configuration
The DIRR register controls generation and clearing of delayed interrupt requests. Writing “1” to the register
generates a delayed interrupt request. Writing “0” to the register clears the delayed interrupt request. The register
is set to the interrupt cleared state by a reset. Either “0” or “1” can be written to the reserved bits. However,
considering possible future extensions, it is recommended that the set bit and clear bit instructions are used for
register access.
(2) Block Diagram
Delayed interrupt generation/release register
bit
151413121110
9
8
Address
: 00009FH
R0
DIRR
Access
(
) () () () () () () (R/W)
Initial value
(
) () () () () () ()
(0)
Delayed interrupt generation/
release decode
Interrupt
latch
F2MC-16LX bus
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