参数资料
型号: MB90654APF
元件分类: 微控制器/微处理器
英文描述: 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP100
封装: PLASTIC, QFP-100
文件页数: 57/106页
文件大小: 873K
代理商: MB90654APF
MB90650A Series
54
(1) 16-bit Free-run Timer
The 16-bit free-run timer consists of a 16-bit up-counter, a control register, and a prescaler. The output of the
timer/counter is used as the base time for the input capture and output compare.
The operating clock for the counter can be selected from four different clocks.
Four internal clocks (
φ/4, φ/16, φ/32, φ/64)
Interrupts can be generated when a counter value overflow or compare match with compare register 0 occurs
(the appropriate mode must be set for a compare match).
The counter can be initialized to 0000H by a reset, software clear, or compare match with compare register 0.
Register details
The count value of the 16-bit free-run timer can be read from this register. The count is cleared to “0000B” by a
reset. Writing to this register sets the timer value. However, only write to the register when the timer is halted
(STOP = “1”). Always use word access.
The 16-bit free-run timer is initialized by the following.
Reset
The clear bit (CLR) of the control status register
A match between the timer/counter value and compare register 0 of the output compare (if the appropriate
mode is set)
Block diagram
Address : 000067H
T15
T14
T13
T12
T11
T10
T09
T08
R/W
Initial value
00000000 B
Upper timer data register (TCDTH)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W : Readable and writable
Address : 000066H
T07
T06
T05
T04
T03
T02
T01
T00
R/W
Initial value
00000000 B
Lower timer data register (TCDTL)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IVF
IVFE
STOP MODE CLR
CLK1 CLK0
16-bit up-counter
Divider
Comparator 0
Clock
φ
Count value output T15 to T00
Interrupt request
Internal
data
bus
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