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参数资料
| 型号： | MB90F462APMC |
| 厂商： | FUJITSU LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64 |
| 文件页数： | 36/88页 |
| 文件大小： | 2202K |
| 代理商： | MB90F462APMC |
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MB90460/465 Series
DS07-13714-2E
41
7.
Multi-functional Timer
The 16-bit multi-functional timer module consists of one 16-bit free-running timer, four input capture circuits, six
output comparators and one channel of 16-bit PPG timer. This module allows six independent waveforms
generated by PPG timer or waveform generator to be outputted. With the 16-bit free-run timer and the input
capture circuit, a input pulse width measurement and external clock cycle measurement can be done.
(1) 16-bit free-running timer (1 channel)
The 16-bit free-running timer consists of a 16-bit up/up-down counter, control register, 16-bit compare clear
register (with buffer register) and a prescaler.
8 types of counter operation clock (
φ, φ/2, φ/4, φ/8, φ/16, φ/32, φ/64, φ/128) can be selected. (φ is the machine
clock)
Two types of interrupt causes :
- Compare clear interrupt is generated when there is a comparing match with compare clear register and 16-
bit free-run timer.
- Zero detection interrupt is generated while 16-bit free-running timer is detected as zero in count value.
EI2OS supported
The compare clear register has a selectable buffer register, into which data is written for transfer to the compare
clear register. When the timer is stopped, transfer occurs immediately when the data is written to the buffer.
When the timer is operation, data transfer from the buffer occurs when the timer value is detected to be zero.
Reset, software clear, compare match with compare clear register in up-count mode will reset the counter
value to “0000H”.
Supply clock to output compare module :
The prescaler ouptut is acted as the count clock of the output compare.
(2) Output compare module (6 channels)
The output compare module consists of six 16-bit compare registers (with selectable buffer register) , compare
output latch and compare control registers. An interrupt is generated and output level is inverted when the
value of 16-bit free-running timer and compare register are matched.
6 compare registers can be operated independently.
Output pins and interrupt flag are corresponding to each compare register.
Inverts output pins by using 2 compare registers together. 2 compare registers can be paired to control the
output pins.
Setting the initial value for each output pin is possible.
Interrupt generated when there is a comparing match with output compare register and 16 bit free-run timer
EI2OS supported
(3) Input capture module (4 channels)
Input capture consists of 4 independent external input pins, the corresponding capture register and capture
control register. By detecting any edge of the input signal from the external pin, the value of the 16-bit free-
running timer can be stored in the capture register and an interrupt is generated simultaneously.
Operation synchronized with the 16-bit free-run timer’s count clock.
3 types of trigger edge (rising edge, falling edge and both edge) of the external input signal can be selected
and there is indication bit to show the trigger edge is rising or falling.
4 input captures can be operated independently.
Two independent interrupts are generated when detecting a valid edge from external input.
EI2OS supported
(4) 16-bit PPG timer (
× 1)
The 16-bit PPG timer 0 is used to provide a PPG signal for waveform generator.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MB90F462APMC-G-SPE1 | 制造商:FUJITSU 功能描述:16-Bit MCU 制造商:FUJITSU 功能描述:16-bit Microcontroller |
| MB90F462APMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F462APMCR-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB90F474HPF-GE1 | 制造商:FUJITSU 功能描述:IC 16BIT MCU I2C SMD QFP100 |
| MB90F474HPFR-GE1 | 制造商:FUJITSU 功能描述: |
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