参数资料
型号: MB90F546GSPFR
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100
文件页数: 1/72页
文件大小: 1685K
代理商: MB90F546GSPFR
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright2002-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.8
The information for microcontroller supports is shown in the following homepage.
Be sure to refer to the "Check Sheet" for the latest cautions on development.
"Check Sheet" is seen at the following support page
"Check Sheet" lists the minimal requirement items to be checked to prevent problems beforehand in
system development.
http://edevice.fujitsu.com/micom/en-support/
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90540G/545G Series
MB90F543G(S)/F546G(S)/F548G(S)/F549G(S)/549G(S)/V540G
MB90543G(S)/547G(S)/548G(S)/F548GL(S)
■ DESCRIPTION
The MB90540G/545G series with FULL-CAN*1 and FLASH ROM is specially designed for automotive and indus-
trial applications. Its main features are on-board CAN Interfaces (MB90540G series: 2 channels, MB90545G
series: 1 channel) , which conform to CAN V2.0A and V2.0B specifications, supporting very flexible message
buffer scheme and so offering more functions than a normal full CAN approach. The instruction set by F2MC-
16LX CPU core inherits an AT architecture of the F2MC*2 family with additional instruction sets for high-level
languages, extended addressing mode, enhanced multiplication/division instructions, and enhanced bit manipu-
lation instructions.The micro controller has a 32-bit accumulator for processing long word data.The MB90540G/
545G series has peripheral resources of 8/10-bit A/D converters, UART (SCI) , extended I/O serial interfaces,
8/16-bit timer, I/O timer (input capture (ICU) , output compare (OCU) ) .
*1 : Controller Area Network (CAN) is the trade mark of Robert Bosch GmbH.
*2 : F2MC stands for FUJITSU Flexible Microcontroller.
■ FEATURES
Clock
Embedded PLL clock multiplication circuit
Operating clock (PLL clock) can be selected from : divided-by-2 of oscillation or one to four times the oscillation
Minimum instruction execution time : 62.5 ns (operation at oscillation of 4 MHz, PLL four times multiplied :
machine clock 16 MHz and at operating VCC = 5.0 V)
Subsystem Clock : 32 kHz
Instruction set to optimize controller applications
Rich data types (bit, byte, word, long word)
Rich addressing mode (23 types)
Enhanced signed multiplication/division instruction and RETI instruction functions
Enhanced precision calculation realized by the 32-bit accumulator
(Continued)
DS07-13703-6E
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