
90
MB90640A Series
Table 21
Bit Manipulation Instructions [21 Instructions]
*1: 8 when branching, 7 when not branching
*2: 7 when branching, 6 when not branching
*3: 10 when condition is satisfied, 9 when not satisfied
*4: Undefined count
*5: Until condition is satisfied
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
B
Operation
LH AH
I
S
T
N
Z
V
C
RMW
MOVB A, dir:bp
MOVB
A, addr16:bp
MOVB A, io:bp
MOVB dir:bp, A
MOVB
addr16:bp, A
MOVB io:bp, A
SETB
dir:bp
SETB
addr16:bp
SETB
io:bp
CLRB
dir:bp
CLRB
addr16:bp
CLRB
io:bp
BBC
dir:bp, rel
BBC
addr16:bp, rel
BBC
io:bp, rel
BBS
dir:bp, rel
BBS
addr16:bp, rel
BBS
io:bp, rel
SBBS
addr16:bp, rel
WBTS io:bp
WBTC io:bp
3
4
3
4
3
4
3
4
3
4
5
4
5
4
5
3
5
4
7
6
7
*1
*2
*1
*2
*3
*4
0
(b)
2
× (b)
2
× (b)
2
× (b)
2
× (b)
2
× (b)
2
× (b)
2
× (b)
2
× (b)
2
× (b)
(b)
2
× (b)
*5
byte (A)
← (dir:bp) b
byte (A)
← (addr16:bp) b
byte (A)
← (io:bp) b
bit (dir:bp) b
← (A)
bit (addr16:bp) b
← (A)
bit (io:bp) b
← (A)
bit (dir:bp) b
← 1
bit (addr16:bp) b
← 1
bit (io:bp) b
← 1
bit (dir:bp) b
← 0
bit (addr16:bp) b
← 0
bit (io:bp) b
← 0
Branch when (dir:bp) b = 0
Branch when (addr16:bp) b = 0
Branch when (io:bp) b = 0
Branch when (dir:bp) b = 1
Branch when (addr16:bp) b = 1
Branch when (io:bp) b = 1
Branch when (addr16:bp) b = 1, bit = 1
Wait until (io:bp) b = 1
Wait until (io:bp) b = 0
Z
–
*
–
*
–
*
–
*
–
*
–
*
–