参数资料
型号: MB91264BPMC-G-XXXE1
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP100
封装: 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, PLASTIC, QFP-100
文件页数: 62/64页
文件大小: 1403K
代理商: MB91264BPMC-G-XXXE1
MB91260B Series
DS07-16507-3E
7
(Continued)
Pin no.
Pin name
Circuit
type
Description
QFP
LQFP
21
19
SOT2
D
UART2 data output pin. This function is enabled when UART2 data output
is enabled.
PG4
General-purpose I/O port. This port is enabled when UART2 data output is
disabled.
22
20
SCK2
D
UART2 clock input/output pin. This function is enabled when UART2 clock
output is enabled.
PG5
General-purpose I/O port. This function is enabled when UART2 clock out-
put is disabled.
23
21
P40
C
General-purpose I/O port.
24
22
P41
C
General-purpose I/O port.
25
23
P42
C
General-purpose I/O port.
26
24
P43
C
General-purpose I/O port.
27
25
P44
C
General-purpose I/O port.
28
26
P45
C
General-purpose I/O port.
29
27
P46
C
General-purpose I/O port.
30
28
P47
C
General-purpose I/O port.
31
29
AN11
G
A/D converter analog input pin. This function is enabled when the AICR2
register specifies analog input.
PE1
General-purpose I/O port. This function is enabled when analog input is
disabled.
32
30
AN10
G
A/D converter analog input pin. This function is enabled when the AICR2
register specifies analog input.
PE0
General-purpose I/O port. This function is enabled when analog input is
disabled.
38
36
AN9
G
A/D converter analog input pin. This function is enabled when the AICR1
register specifies analog input.
PD1
General-purpose I/O port. This function is enabled when analog input is
disabled.
39
37
AN8
G
A/D converter analog input pin. This function is enabled when the AICR1
register specifies analog input.
PD0
General-purpose I/O port. This function is enabled when analog input is
disabled.
41
39
AN7
G
A/D converter analog input pin. This function is enabled when the AICR0
register specifies analog input.
PC7
General-purpose I/O port. This function is enabled when analog input is
disabled.
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