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参数资料
| 型号： | MB91F313APMC-GE1 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP120 |
| 封装： | 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120 |
| 文件页数： | 15/72页 |
| 文件大小： | 1843K |
| 代理商： | MB91F313APMC-GE1 |
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MB91313A Series
22
DS07-16706-4E
5) Notes on the PS register
Some instructions write to the PS register in advance before executing. When a debugger is being used,
execution may break within an interrupt handler routine, or the values of the flags within the PS register may
be updated due to exception processing. However, the microcontroller is designed to reprocess correctly
after returning from the EIT, and to execute before and after the EIT proceeds according to the specifications.
In any following situation, the previous instructions before a DIV0U or DIV0S instruction may take the
processing in (1) to (3).
- A user interrupt or NMI is accepted
- Step execution is performed
- A break occurs due to a data event or by being selected from the emulator menu
(1) The D0 and D1 flags are updated in advance.
(2) The EIT handling routine (user interrupt/NMI or emulator) is executed.
(3) Upon returning from the EIT, the DIV0U or DIV0S instruction is executed and the D0/D1 flags are
updated back to the same value as in step (1).
If any of the OR CCR, ST ILM, or MOV Ri, PS instructions are executed to enable a user interrupt or NMI
interrupt source when that interrupt has occurred, the following operation will be performed.
(1) The PS register is updated in advance.
(2) The EIT handling routine (user interrupt/NMI or emulator) is executed.
(3) Upon returning from the EIT, the above instructions are executed and the PS registers are updated
back to the same value as in step (1).
6) Watchdog timer
The watchdog timer has a function to monitors the program to check that it delays a reset within a certain
period of time, and resets the CPU if the program runs out of control and fails to delay the reset. Once the
watchdog timer has been enabled, it keeps running until reset. As an exception, the reset is automatically
delayed in conditions where the execution of the CPU program stops. It is possible that the watchdog timer
will not be triggered if these conditions arise as a result of the system running out of control. In that case,
please reset (INIT) using the external INITX pin.
7) Notes on using the A/D converter
Do not supply a voltage higher than the VDDE pin to the AVCC pin.
8) Software reset in synchronous mode
When using the software reset in synchronous mode, the following two conditions should be satisfied before
setting the SRST bit in STCR (standby control register) to “0”.
The interrupt enable flag (I-Flag) is set to interrupts disabled (I-Flag
= 0) .
The NMI is not being used.
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相关代理商/技术参数 |
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| MB91F314 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Microcontroller |
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| MB91F318R | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Proprietary Microcontrollers |
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