参数资料
型号: MB95D108ASPFM
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP64
封装: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件页数: 51/67页
文件大小: 824K
代理商: MB95D108ASPFM
MB95100A Series
55
(8) I2C Timing
(VCC
= 3.3 V, AVSS = VSS = 0.0 V, TA = 40 °C to + 85 °C)
*1 : R, C : Pull-up resistor and load capacitor of the SCL and SDA lines.
*2 : The maximum tHD;DAT have only to be met if the device dose not stretch the “L” width (tLOW) of the SCL signal.
*3 : A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement
tSU;DAT
≥ 250 ns must then be met.
Parameter
Symbol
Pin
name
Conditions
Value
Unit Remarks
Standard-mode
Fast-mode
Min
Max
Min
Max
SCL clock frequency
fSCL
SCL0
R
= 1.7 k,
C
= 50 pF*1
0
100
0
400
kHz
(Repeat) Start condition
hold time SDA
↓ → SCL ↓
tHD;STA
SCL0
SDA0
4.0
0.6
s
SCL clock “L” width
tLOW
SCL0
4.7
1.3
s
SCL clock “H” width
tHIGH
SCL0
4.0
0.6
s
(Repeat) Start condition
setup time SCL
↑ → SDA ↓
tSU;STA
SCL0
SDA0
4.7
0.6
s
Data hold time SCL
↓ →
SDA
↓ ↑
tHD;DAT
SCL0
SDA0
03.45*2
00.9*3
s
Data setup time SDA
↓ ↑ →
SCL
tSU;DAT
SCL0
SDA0
0.25
0.1
s
Stop condition setup time
SCL
↑ → SDA ↑
tSU;STO
SCL0
SDA0
4
0.6
s
Bus free time between stop
condition and start condition
tBUF
SCL0
SDA0
4.7
1.3
s
SDA0
SCL0
tWAKEUP
tHD;STA
tHD;DAT
tHD;STA
tSU;STA
tLOW
tSU;DAT
tHIGH
tSU;STO
tBUF
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