参数资料
型号: MB95F118BSPV2
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 16.25 MHz, MICROCONTROLLER, PBCC48
封装: 7 X 7 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LCC-48
文件页数: 23/68页
文件大小: 2637K
代理商: MB95F118BSPV2
MB95110B Series
DS07-12615-3E
3
■ PRODUCT LINEUP
(Continued)
Part number
Parameter
MB95116B
MB95F118BS
MB95F118BW
Type
MASK ROM product
Flash memory product
ROM capacity
32 Kbytes
60 Kbytes
RAM capacity
1 Kbyte
2 Kbytes
Reset output
No
Op
tio
n
*
1
Clock system
Selectable
single/dual clock*2
Single clock
Dual clock
Low voltage
detection reset
No
CPU functions
Number of basic instructions
: 136
Instruction bit length
: 8 bits
Instruction length
: 1 to 3 bytes
Data bit length
: 1, 8, and 16 bits
Minimum instruction execution time : 61.5 ns (at machine clock frequency 16.25MHz)
Interrupt processing time
: 0.6
μs (at machine clock frequency 16.25 MHz)
General-purpose I/O
port
Single clock product : 39 ports (N-ch open drain : 2 ports, CMOS : 37 ports)
Dual clock product : 37 ports (N-ch open drain : 2 ports, CMOS : 35 ports)
Time-base timer
Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)
Watchdog timer
Reset generated cycle
At main oscillation clock 10 MHz
: Minimum 105 ms
At sub oscillation clock 32.768 kHz (for dual clock product) : Minimum 250 ms
Wild register
Capable of replacing 3 bytes of ROM data
I2C
Master/slave sending and receiving
Bus error function and arbitration function
Detecting transmitting direction function
Start condition repeated generation and detection functions
Built-in wake-up function
UART/SIO
Data transfer capable in UART/SIO
Full duplex double buffer, variable data length (5/6/7/8-bit), built-in baud rate generator
NRZ type transfer format, error detected function
LSB-first or MSB-first can be selected.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable.
LIN-UART
Dedicated reload timer allowing a wide range of communication speeds to be set.
Full duplex double buffer.
Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable.
LIN functions available as the LIN master or LIN slave.
8/10-bit A/D converter
(8 channels)
8-bit or 10-bit resolution can be selected.
Peri
phe
ra
lf
u
n
c
ti
o
n
s
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