参数资料
型号: MB95F133JSPFV
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 32.5 MHz, MICROCONTROLLER, PDSO28
封装: 8.60 X 17.75 MM, 2.80 MM HEIGHT, 1.27 MM PITCH, PLASTIC, SOP-28
文件页数: 44/63页
文件大小: 522K
代理商: MB95F133JSPFV
MB95130M Series
49
Sampling at the falling edge of sampling clock*1 and enabled serial clock delay*2
(ESCR register : SCES bit
= 1, ECCR register : SCDE bit = 1)
(VCC
= 5.0 V± 10%, AVSS = VSS = 0.0 V, TA = 40 °C to + 85 °C)
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
serial clock.
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for tMCLK.
Parameter
Sym-
bol
Pin name
Condition
Value
Unit
Min
Max
Serial clock cycle time
tSCYC
SCK
Internal clock
operating output pin :
CL
= 80 pF + 1 TTL.
5 tMCLK*3
ns
SCK
↓→ SOT delay time
tSLOVI
SCK, SOT
95
+95
ns
Valid SIN
→ SCK↑
tIVSHI
SCK, SIN
tMCLK*3
+ 190
ns
SCK
↑→ valid SIN hold time
tSHIXI
SCK, SIN
0
ns
SOT
→ SCK↑ delay time
tSOVHI
SCK, SOT
4 tMCLK*3
ns
SCK
SOT
SIN
2.4 V
0.8 V
tSLOVI
2.4 V
0.8 V
0.8 VCC
0.2 VCC
0.8 VCC
0.2 VCC
2.4 V
0.8 V
tSCYC
tSOVHI
tIVSHI
tSHIXI
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