参数资料
型号: MB95F352EPFT-G-SNE2
厂商: FUJITSU LTD
元件分类: 微控制器/微处理器
英文描述: MICROCONTROLLER, PDSO24
封装: 4.40 X 7.80 MM, 1.20 MM HEIGHT, 0.65 MM PITCH, PLASTIC, TSSOP-24
文件页数: 12/60页
文件大小: 3076K
代理商: MB95F352EPFT-G-SNE2
MB95350L Series
2
DS07–12631–2E
(Continued)
I2C
× 2 channels (One of the two channels can be used either as an I2C channel or as a UART/SIO channel.)
Supports Standard-mode and Fast-mode (400 kHz)
Built-in wake-up function
LIN-UART
Full duplex double buffer
Capable of clock-synchronous serial data transfer and clock-asynchronous serial data transfer
External interrupt
× 6 channels
Interrupt by edge detection (rising edge, falling edge, and both edges can be selected)
Can be used to wake up the device from different low power consumption (standby) modes
8/10-bit A/D converter
× 6 channels
8-bit and 10-bit resolution can be chosen.
Low power consumption (standby) modes
Stop mode
Sleep mode
Watch mode
Time-base timer mode
I/O port
MB95F352L/F353L/F354L (maximum no. of I/O ports: 21)
General-purpose I/O ports (N-ch open drain)
: 3
General-purpose I/O ports (CMOS I/O)
: 18
MB95F352E/F353E/F354E (maximum no. of I/O ports: 22)
General-purpose I/O ports (N-ch open drain)
: 3
General-purpose I/O ports (CMOS I/O)
: 18
General-purpose input port (CMOS input)
: 1
On-chip debug
1-wire serial control
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
Built-in hardware watchdog timer
Low-voltage detection reset and interrupt circuit
Built-in low-voltage detector
Clock supervisor counter
Built-in clock supervisor counter function
Programmable port input voltage level
CMOS input level / hysteresis input level
Dual operation Flash memory
The erase/write operation and the read operation can be executed in different banks (upper bank/lower
bank) simultaneously.
Flash memory security function
Protects the content of the Flash memory
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