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参数资料
型号： MB9BF106RAPMC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP120
封装： 16 X 16 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-120
文件页数： 13/100页
文件大小： 1010K
代理商： MB9BF106RAPMC
2
FUJITSU SEMICONDUCTOR CONFIDENTIAL
r4.0
MB9B100A Series
FEATURES
32-bit ARM Cortex-M3 Core
·
Processor version: r2p0
·
Up to 80MHz Frequency Operation
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Memory Protection Unit (MPU): improve the reliability of an embedded system
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Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48
peripheral interrupts and 16 priority levels
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24-bit System timer (Sys Tick): System timer for OS task management
On-chip Memories
[Flash memory]
·
Up to 512 Kbyte
·
Read cycle: 0wait-cycle@up to 60MHz, 2wait-cycle* above
*: Instruction pre-fetch buffer is included. So when CPU access continuously, it becomes 0wait-cycle
·
Security function for code protection
[SRAM]
This series contain a total of up to 64Kbyte on-chip SRAM memories. This is composed of two independent
SRAM can process simultaneously.
SRAM0 is connected to I-Code bus and D-Code bus of Cortex-M3 core.
SRAM1 is connected to System bus.
·
SRAM0: Up to 32 Kbyte
·
SRAM1: Up to 32 Kbyte
External Bus Interface
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Supports SRAM, NOR& NAND Flash device
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Up to 8 chip selects
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8/16-bit Data width
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Up to 25-bit Address bit
Multi-function Serial Interface (Max. 8channels)
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4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3)
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Operation mode is selectable from the followings for each channel.
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UART
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CSIO
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LIN
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I2C
[UART]
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Full-duplex double buffer
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Selection with or without parity supported
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Built-in dedicated baud rate generator
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External clock available as a serial clock
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Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4)
·
Various error detect functions available (parity errors, framing errors, and overrun errors)
[CSIO]
·
Full-duplex double buffer
·
Built-in dedicated baud rate generator
·
Overrun error detect function available
DS706-00020-1v0-E
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