参数资料
| 型号： | MC100E210FNG |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/6页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER 1:4/1:5 28-PLCC |
| 产品变化通告： | Dimensional change 21/Oct/2008 |
| 标准包装： | 37 |
| 系列： | 100E |
| 类型： | 扇出缓冲器（分配） |
| 电路数： | 2 |
| 比率 - 输入:输出： | 1:4，1:5 |
| 差分 - 输入:输出： | 是/是 |
| 输入： | ECL，PECL |
| 输出： | ECL，PECL |
| 频率 - 最大： | 700MHz |
| 电源电压： | 4.2 V ~ 5.7 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-LCC（J 形引线） |
| 供应商设备封装： | 28-PLCC（11.51x11.51） |
| 包装： | 管件 |
MC100E210
http://onsemi.com
4
40°C
25°C
85°C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
fMAX
Maximum Toggle Frequency
700
MHz
tPLH
tPHL
Propagation Delay to Output
IN (differential) (Note 8)
IN (singleended) (Note 9)
475
400
675
700
500
450
700
750
500
450
700
750
ps
tskew
WithinDevice Skew
Qa to Qb
Qa to Qa,Qb to Qb
ParttoPart Skew (Differential) (Note 10)
50
75
200
50
30
75
50
200
50
30
75
50
200
ps
tJITTER
Random Clock Jitter (RMS)
< 1
ps
VPP
Input Voltage Swing (Differential Configuration)
(Note 11)
500
mV
tr / tf
Output Rise/Fall Time (20%80%)
200
600
200
600
200
600
ps
7. VEE can vary 0.46 V / +0.8 V.
8. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
9. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
10.The withindevice skew is defined as the worst case difference between any two similar delay paths within a single device.
11. VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP(min) is AC limited
for the E210 as a differential input as low as 50 mV will still produce full ECL levels at the output.
Figure 1. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020 Termination of ECL Logic Devices.)
W
Driver
Device
Receiver
Device
QD
50
W
50
V TT
Q
D
VTT = VCC 2.0 V
Resource Reference of Application Notes
AN1404
ECLinPS Circuit Performance at NonStandard VIH Levels
AN1405
ECL Clock Distribution Techniques
AN1406
Designing with PECL (ECL at +5.0 V)
AN1503
ECLinPS I/O SPICE Modeling Kit
AN1504
Metastability and the ECLinPS Family
AN1568
Interfacing Between LVDS and ECL
AN1596
ECLinPS Lite Translator ELT Family SPICE I/O Model Kit
AN1650
Using WireOR Ties in ECLinPS Designs
AN1672
The ECL Translator Guide
AND8001
Odd Number Counters Design
AND8002
Marking and Date Codes
AND8020
Termination of ECL Logic Devices
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相关代理商/技术参数 |
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| MC100E210FNR2 | 功能描述:时钟缓冲器 5V ECL Dual 1:4 1:5 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MC100E210FNR2G | 功能描述:时钟缓冲器 5V ECL Dual 1:4 1:5 Diff Fanout Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MC100E211 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:1:6 DIFFERENTIAL CLOCK DISTRIBUTION CHIP |
| MC100E211FN | 功能描述:时钟驱动器及分配 5V ECL Diff Clock RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100E211FNG | 功能描述:时钟驱动器及分配 5V ECL Diff Clock Distribution RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
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