参数资料
| 型号： | MC100EP195FAG |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/20页 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 1024TAP 32-LQFP |
| 标准包装： | 250 |
| 系列： | 100EP |
| 标片/步级数： | 1024 |
| 功能： | 可编程 |
| 延迟到第一抽头： | 2.2ns |
| 接头增量： | 10ps |
| 可用的总延迟： | 2.2ns ~ 12.2ns |
| 独立延迟数： | 1 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 托盘 |
| 其它名称： | MC100EP195FAGOS |
MC10EP195, MC100EP195
http://onsemi.com
13
Figure 5. AC Reference Measurement
IN
Q
tPHL
tPLH
VINPP = VIH(D) VIL(D)
VOUTPP = VOH(Q) VOL(Q)
Cascading Multiple EP195s
To increase the programmable range of the EP195,
internal cascade circuitry has been included. This circuitry
allows for the cascading of multiple EP195s without the
need for any external gating. Furthermore, this capability
requires only one more address line per added E195.
Obviously, cascading multiple programmable delay chips
will result in a larger programmable range: however, this
increase is at the expense of a longer minimum delay.
Figure 6 illustrates the interconnect scheme for cascading
two EP195s. As can be seen, this scheme can easily be
expanded for larger EP195 chains. The D10 input of the
EP195 is the CASCADE control pin. With the interconnect
scheme of Figure 6 when D10 is asserted, it signals the need
for a larger programmable range than is achievable with a
single device and switches output pin CASCADE HIGH and
pin CASCADE LOW. The A11 address can be added to
generate a cascade output for the next EP195. For a 2device
configuration, A11 is not required.
VEE
D0
VCC
Q
NC
VCC
CASCADE
EN
SETMAX
V
CC
V
EE
LEN
D2 D1
CASCADE
SETMIN
VBB
IN
VEE
D8
VEF
D3
D4
D5
D6
D7
D9
D10
IN
VCF
INPUT
OUTPUT
VEE
D0
VCC
Q
NC
VCC
CASCADE
EN
SETMAX
V
CC
V
EE
LEN
D2 D1
CASCADE
SETMIN
VBB
IN
VEE
D8
VEF
D3
D4
D5
D6
D7
D9
D10
IN
VCF
EP195
CHIP #2
EP195
CHIP #1
ADDRESS BUS
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Need if Chip #3 is used
Figure 6. Cascading Interconnect Architecture
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC100EP195FAG | 制造商:ON Semiconductor 功能描述:DELAY LINE IC |
| MC100EP195FAR2 | 功能描述:延迟线/计时元素 3.3V/5V ECL RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| MC100EP195FAR2G | 功能描述:延迟线/计时元素 3.3V/5V ECL Programmable Delay RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| MC100EP195MNG | 功能描述:延迟线/计时元素 BBG ECL PROG DELAY CHIP RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
| MC100EP195MNR4G | 功能描述:延迟线/计时元素 BBG ECL PROG DELAY CHIP RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 传播延迟时间:1000 ps 工作温度范围: 封装 / 箱体:QFN-24 封装:Tube |
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