参数资料
型号: MC100EP33MNR4
厂商: ON Semiconductor
文件页数: 8/11页
文件大小: 0K
描述: IC DIVIDER BY4 ECL CLK IN 8-DFN
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 1,000
系列: 100EP
逻辑类型: 除以 4
元件数: 1
每个元件的位元数: 1
复位: 异步
计数速率: 4GHz
触发器类型: 正,负
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-VFDFN 裸露焊盘
供应商设备封装: 8-DFN(2x2)
包装: 带卷 (TR)
MC10EP33, MC100EP33
http://onsemi.com
6
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = 5.5 V to 3.0 V (Note 18)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
IEE
Power Supply Current
18
26
40
23
26
45
23
26
45
mA
VOH
Output HIGH Voltage (Note 19)
1145 1020
895
1145 1020
895
1145 1020
895
mV
VOL
Output LOW Voltage (Note 19)
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
VIH
Input HIGH Voltage (SingleEnded)
1225
880
1225
880
1225
880
mV
VIL
Input LOW Voltage (SingleEnded)
1945
1625 1945
1625
mV
VBB
Output Voltage Reference
1525 1425 1325 1525 1425 1325 1525 1425 1325
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 20)
VEE+2.0
0.0
VEE+2.0
0.0
VEE+2.0
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18.Input and output parameters vary 1:1 with VCC.
19.All loading with 50 W to VCC 2.0 V.
20.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = 3.0 V to 5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VOPP
Output Voltage Amplitude
(See Figure 3)
fin < 4.0 GHz
fin < 4.5 GHz
700
600
700
600
700
600
mV
tPLH,
tPHL
Propagation Delay to
CLK/Q
Output Differential
RESET/Q
300
370
380
420
440
470
300
370
380
420
440
470
320
400
450
460
500
ps
tRR
Set/Rest Recovery
150
100
200
100
200
100
ps
tPW
Minimum Pulse width
RESET
550
480
550
480
550
480
ps
tJITTER
Random Clock Jitter (RMS)
0.2
2
0.2
2
0.2
2
ps
VPP
Input Voltage Swing
(Differential Configuration)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
Q, Q
(20% 80%)
90
170
200
100
180
250
120
200
280
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
21.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
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