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参数资料
| 型号： | MC100ES6056DT |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 编、解码器及复用、解复用 |
| 英文描述： | 100E SERIES, DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20 |
| 封装： | 0.65 MM PITCH, TSSOP-20 |
| 文件页数： | 1/8页 |
| 文件大小： | 249K |
| 代理商： | MC100ES6056DT |
MC100ES6056
Rev 4, 06/2005
Freescale Semiconductor
Technical Data
Freescale Semiconductor, Inc., 2005. All rights reserved.
2.5 V/3.3 V ECL/PECL/LVDS
Dual Differential 2:1 Multiplexer
The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential
data path makes the device ideal for multiplexing low skew clock or other skew
sensitive signals. Multiple VBB pins are provided.
The VBB pin, an internally generated voltage supply, is available to this device
only. For single-ended input conditions, the unused differential input is connected
to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs.
When used, decouple VBB and VCC via a 0.01 F capacitor and limit current
sourcing or sinking to 0.5 mA. When not used, VBB should be left open.
The device features both individual and common select inputs to address both
data path and random logic applications.
The 100ES Series contains temperature compensation.
Features
360 ps Typical Propagation Delays
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
ECL Mode Operating Range: VCC = 0 V with VEE = –2.375 V to –3.8 V
Open Input Default State
Separate and Common Select
Q Output Will Default LOW with Inputs Open or at VEE
VBB Outputs
LVDS Input Compatible
20-Lead Pb-Free Package Available
MC100ES6056
ORDERING INFORMATION
Device
Package
MC100ES6056DT
TSSOP-20
MC100ES6056DTR2
TSSOP-20
MC100ES6056EJ
TSSOP-20 (Pb-Free)
MC100ES6056EJR2
TSSOP-20 (Pb-Free)
DT SUFFIX
20-LEAD TSSOP PACKAGE
CASE 948E-03
EJ SUFFIX
20-LEAD TSSOP PACKAGE
Pb-FREE PACKAGE
CASE 948E-03
Warning: All VCC and VEE pins must be externally connected to
Power Supply to guarantee proper operation.
4
3
56
789
10
2
1
17
18
16
15
14
13
12
11
19
20
10
1
0
VCC
Q0
SEL0 COM_SEL SEL1 VCC
Q1
VEE
D0a
VBB0
D0b
D1a
VBB1
D1b
Figure 1. 20-Lead Pinout (Top View) and Logic Diagram
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC100ES6056DTR2 | 功能描述:IC CLOCK MUX 2:1 3GHZ 20-TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:100ES 标准包装:74 系列:- 类型:扇出缓冲器（分配） 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 输入:HCSL, LVCMOS, LVDS, LVPECL, LVTTL 输出:HCSL，LVDS 频率 - 最大:400MHz 电源电压:3 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:32-VFQFN 裸露焊盘 供应商设备封装:32-QFN（5x5） 包装:管件 |
| MC100ES6056EG | 功能描述:时钟发生器及支持产品 FSL Dual Diff LVPECL/LVDS 2:1 Mux RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MC100ES6056EGR2 | 功能描述:时钟发生器及支持产品 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MC100ES6056EJ | 功能描述:时钟驱动器及分配 FSL Dual Diff LVPECL/LVDS 2:1 Mux RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MC100ES6056EJR2 | 功能描述:时钟发生器及支持产品 FSL Dual Diff LVPECL/LVDS 2:1 Mux RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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