参数资料
型号: MC100ES6222AE
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 100E SERIES, LOW SKEW CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52
封装: LEAD FREE, LQFP-52
文件页数: 10/12页
文件大小: 304K
代理商: MC100ES6222AE
Advanced Clock Drivers Devices
Freescale Semiconductor
7
MC100ES6222
APPLICATIONS INFORMATION
Understanding the Junction Temperature Range
of the MC100ES6222
To make the optimum use of high clock frequency and low
skew capabilities of the MC100ES6222, the MC100ES6222
is specified, characterized and tested for the junction
temperature range of TJ =0°C to +110°C. Because the exact
thermal performance depends on the PCB type, design,
thermal management and natural or forced air convection,
the junction temperature provides an exact way to correlate
the application specific conditions to the published
performance data of this data sheet. The correlation of the
junction temperature range to the application ambient
temperature range and vice versa can be done by
calculation:
TJ = TA + Rthja Ptot
Assuming a thermal resistance (junction to ambient) of
17
°C/W (2s2p board, 200 ft/min airflow, see Table 9. Thermal
Resistance) and a typical power consumption of 1026 mW
(all outputs terminated 50 ohms to VTT, VCC =3.3 V,
frequency independent), the junction temperature of the
MC100ES6222 is approximately TA +17°C, and the
minimum ambient temperature in this example case
calculates to –17
°C (the maximum ambient temperature
is 93
°C, see Table 8). Exceeding the minimum junction
temperature specification of the MC100ES6222 does not
have a significant impact on the device functionality.
However, the continuous use the MC100ES6222 at high
ambient temperatures requires thermal management to not
exceed the specified maximum junction temperature. Please
see the application note AN1545 for a power consumption
calculation guideline.
Maintaining Lowest Device Skew
The MC100ES6222 guarantees low output-to-output bank
skew of 130 ps and a part-to-part skew of max. 300 ps. To
ensure low skew clock signals in the application, both outputs
of any differential output pair need to be terminated
identically, even if only one output is used. When fewer than
all nine output pairs are used, identical termination of all
output pairs within the output bank is recommended. This will
reduce the device power consumption while maintaining
minimum output skew.
Power Supply Bypassing
The MC100ES6222 is a mixed analog/digital product. The
differential architecture of the MC100ES6222 supports low
noise signal operation at high frequencies. In order to
maintain its superior signal quality, all VCC pins should be
bypassed by high-frequency ceramic capacitors connected
to GND. If the spectral frequencies of the internally generated
switching noise on the supply pins cross the series resonant
point of an individual bypass capacitor, its overall impedance
begins to look inductive and thus increases with increasing
frequency. The parallel capacitor combination shown ensures
that a low impedance path to ground exists for frequencies
well above the noise bandwidth.
Figure 6. VCC Power Supply Bypass
Table 8. Ambient Temperature Ranges (Ptot = 1026 mW)
Rthja (2s2p board)
TA, Min(1)
1. The MC100ES6222 device function is guaranteed from
TA = –40°C to TJ = 110°C.
TA, Max
Natural convection
20
°C/W
–21
°C
89
°C
100 ft/min
18
°C/W
–18
°C
92
°C
200 ft/min
17
°C/W
–17
°C
93
°C
400 ft/min
16
°C/W
–16
°C
94
°C
800 ft/min
15
°C/W
–15
°C
95
°C
VCC
MC100ES6222
VCC
33...100 nF
0.1 nF
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