参数资料
型号: MAX6956ATL+
厂商: Maxim Integrated
文件页数: 5/24页
文件大小: 0K
描述: IC DRVR DSPL LED 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
显示器类型: LED
接口: I²C
电流 - 电源: 180µA
电源电压: 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(6x6)
包装: 管件
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
Pin Description
SSOP/DIP
1
2, 3
4
PIN
SSOP
1
2, 3
4
TQFN
36
37, 38, 39
40
NAME
ISET
GND
AD0
FUNCTION
Segment Current Setting. Connect ISET to GND through a resistor (R ISET ) to set
the maximum segment current.
Ground
Address Input 0. Sets device slave address. Connect to either GND, V+, SCL,
SDA to give four logic combinations. See Table 3.
LED Segment Drivers and GPIO. P12 to P31 can be configured as CA LED
5–24
P12–P31
drivers, GPIO outputs, CMOS logic inputs, or CMOS logic inputs with weak
pullup resistor.
1–10,
LED Segment Drivers and GPIO. P4 to P31 can be configured as CA LED
5–32
12–19,
P4–P31
drivers, GPIO outputs, CMOS logic inputs, or CMOS logic inputs with weak
21–30
pullup resistor.
25
26
27
28
33
34
35
36
11, 20, 31
32
33
34
35
N.C.
SDA
SCL
AD1
V+
EP
No Connection
I 2 C-Compatible Serial Data I/O
I 2 C-Compatible Serial Clock Input
Address Input 1. Sets device slave address. Connect to either GND, V+, SCL,
SDA to give four logic combinations. See Table 3.
Positive Supply Voltage. Bypass V+ to GND with minimum 0.047μF capacitor.
Exposed Pad (TQFN Only). Not internally connected. Connect EP to ground
plane for maximum thermal performance.
Detailed Description
The MAX6956 LED driver/GPIO peripheral provides up
to 28 I/O ports, P4 to P31, controlled through an I 2 C-com-
patible serial interface. The ports can be configured to
any combination of constant-current LED drivers, logic
inputs and logic outputs, and default to logic inputs on
power-up. When fully configured as an LED driver, the
MAX6956 controls up to 28 LED segments with individual
16-step adjustment of the constant current through each
LED segment. A single resistor sets the maximum seg-
ment current for all segments, with a maximum of 24mA
per segment. The MAX6956 drives any combination of
discrete LEDs and CA digits, including seven-segment
and starburst alphanumeric types.
Figure 1 is the MAX6956 functional diagram. Any I/O
port can be configured as a push-pull output (sinking
10mA, sourcing 4.5mA), or a Schmitt-trigger logic input.
Each input has an individually selectable internal pullup
resistor. Additionally, transition detection allows seven
ports (P24 through P30) to be monitored in any mask-
able combination for changes in their logic status. A
detected transition is flagged through a status register
bit, as well as an interrupt pin (port P31), if desired.
The Typical Operating Circuit shows two MAX6956s
working together controlling three monocolor 16-seg-
ment-plus-DP displays, with five ports left available for
GPIO (P26–P31 of U2).
The port configuration registers set the 28 ports, P4 to
P31, individually as either LED drivers or GPIO. A pair
of bits in registers 0x09 through 0x0F sets each port’s
configuration (Tables 1 and 2).
The 36-pin MAX6956AAX has 28 ports, P4 to P31. The
28-pin MAX6956ANI and MAX6956AAI make only 20
ports available, P12 to P31. The eight unused ports
should be configured as outputs on power-up by writ-
ing 0x55 to registers 0x09 and 0x0A. If this is not done,
the eight unused ports remain as unconnected inputs
and quiescent supply current rises, although there is no
damage to the part.
Register Control of I/O Ports and LEDs
Across Multiple Drivers
The MAX6956 offers 20 or 28 I/O ports, depending on
package choice. These can be applied to a variety of
combinations of different display types, for example:
seven, 7-segment digits (Figure 7). This example
requires two MAX6956s, with one digit being driven by
both devices, half by one MAX6956, half by the other
(digit 4 in this example). The two drivers are static, and
therefore do not need to be synchronized. The
MAX6956 sees CA digits as multiple discrete LEDs. To
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