参数资料
型号: MC100LVEL32DTR2
厂商: ON Semiconductor
文件页数: 4/8页
文件大小: 0K
描述: IC DIVIDER DIV X2 3.3V 8-TSSOP
产品变化通告: Product Discontinuation 20/Aug/2008
标准包装: 2,500
系列: 100LVEL
逻辑类型: 除以 2
元件数: 1
每个元件的位元数: 1
复位: 异步
计数速率: 2.6GHz
触发器类型: 正,负
电源电压: 3 V ~ 3.8 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-TSSOP
包装: 带卷 (TR)
MC100LVEL32
http://onsemi.com
4
Table 5. AC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = 3.3 V (Note 8)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Toggle Frequency
2.2
2.5
2.4
2.6
2.8
GHz
tPLH
tPHL
Propagation Delay CLK to Q (Differential)
CLK to Q (SingleEnded)
Reset to Q
350
300
440
500
555
530
580
640
370
320
450
510
540
550
600
650
410
360
480
540
580
590
640
680
ps
tRR
Reset Recovery
175
50
175
50
175
50
ps
tPW
Minimum Pulse Width Reset
500
300
500
300
500
300
ps
tJITTER
Random Clock Jitter (RMS)
2.0
ps
VPP
Input Swing (Differential Swing) (Note 9)
150
1000
150
1000
150
1000
mV
tr
tf
Output Rise/Fall Times Q
(20% 80%)
120
225
320
120
225
320
120
225
320
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. VEE can vary ±0.3 V.
9. VPP(min) is input swing measured singleended on each input in differential configuration.
Figure 1. Timing Diagram
CLK
RESET
Q
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
50 W
VTT
VTT = VCC 2.0 V
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