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参数资料
| 型号： | MC100LVEL51DTR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 1/9页 |
| 文件大小： | 0K |
| 描述： | IC FLIP FLOP DIFF CLK D 8-TSSOP |
| 标准包装： | 2,500 |
| 系列： | 100LVEL |
| 功能： | 复位 |
| 类型： | D 型 |
| 输出类型： | 差分 |
| 元件数： | 1 |
| 每个元件的位元数： | 1 |
| 频率 - 时钟： | 2.8GHz |
| 延迟时间 - 传输： | 475ps |
| 触发器类型： | 正边沿 |
| 电源电压： | 3 V ~ 3.8 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 包装： | 带卷 (TR) |
Semiconductor Components Industries, LLC, 2008
August, 2008 Rev. 6
1
Publication Order Number:
MC100LVEL51/D
MC100LVEL51
3.3VECL Differential Clock
D Flip‐Flop
Description
The MC100LVEL51 is a differential clock D flip-flop with reset. The
device is functionally equivalent to the EL51 device, but operates from a
3.3 V supply. With propagation delays and output transition times
essentially equal to the EL51, the LVEL51 is ideally suited for those
applications which require the ultimate in AC performance at 3.3 V VCC.
The reset input is an asynchronous, level triggered signal. Data enters
the master portion of the flip-flop when the clock is LOW and is
transferred to the slave, and thus the outputs, upon a positive transition of
the clock. The differential clock inputs of the LVEL51 allow the device to
be used as a negative edge triggered flip-flop.
The differential input employs clamp circuitry to maintain stability
under open input conditions. When left open, the CLK input will be
pulled down to VEE and the CLK input will be biased at VCC/2.
Features
475 ps Propagation Delay
2.8 GHz Toggle Frequency
ESD Protection: >4 kV Human Body Model,
>200 V Machine Model
The 100 Series Contains Temperature Compensation
PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 3.0 V to 3.8 V
Internal Input Pulldown Resistors
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 114 devices
PbFree Packages are Available
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KV51
ALYWG
G
SOIC8
D SUFFIX
CASE 751
1
8
TSSOP8
DT SUFFIX
CASE 948R
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
KVL51
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
4G
M
G
14
(Note: Microdot may be in either location)
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = PbFree Package
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相关代理商/技术参数 |
参数描述 |
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| MC100LVEL51MNR4G | 功能描述:触发器 BBG ECL FL FLOP DIFF RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| MC100LVEL56DW | 功能描述:编码器、解码器、复用器和解复用器 3.3V ECL Dual Diff RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| MC100LVEL56DWG | 功能描述:编码器、解码器、复用器和解复用器 3.3V ECL Dual Diff 2:1 Mux RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| MC100LVEL56DWR2 | 功能描述:编码器、解码器、复用器和解复用器 3.3V ECL Dual Diff RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
| MC100LVEL56DWR2G | 功能描述:编码器、解码器、复用器和解复用器 3.3V ECL Dual Diff 2:1 Mux RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量（输入/输出）:2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray |
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