参数资料
型号: MC10138FN
厂商: MOTOROLA INC
元件分类: 通用总线功能
英文描述: Synchronous 4-Bit Up/Down Counters (Dual Clock With Clear) 16-CDIP -55 to 125
中文描述: 10K SERIES, SYN POSITIVE EDGE TRIGGERED 3-BIT UP BINARY COUNTER, PQCC20
封装: PLASTIC, LCC-20
文件页数: 2/5页
文件大小: 117K
代理商: MC10138FN
MC10138
MOTOROLA
MECL Data
DL122 — Rev 6
3–42
ELECTRICAL CHARACTERISTICS
Pin
Under
Test
Test Limits
–30
°
C
+25
°
C
+85
°
C
Characteristic
Symbol
Min
Max
Min
Typ
Max
Min
Max
Unit
Power Supply Drain Current
IE
IinH
8
97
70
88
97
mAdc
Input Current
12
5,6,10,11
7
9
350
390
460
650
220
245
290
410
220
245
290
μ
Adc
IinL
VOH
All
0.5
0.5
0.3
μ
Adc
Output Voltage
Logic 1
3,14
(
3.
)
2,4,13,15
(
2.
)
–1.060
–1.060
–0.890
–0.890
–0.960
–0.960
–0.810
–0.810
–0.890
–0.890
–0.700
–0.700
Vdc
Output Voltage
Logic 0
VOL
3,14
(
2.
)
2,4,13,15
(
3.
)
–1.890
–1.890
–1.675
–1.675
–1.850
–1.850
–1.650
–1.650
–1.825
–1.825
–1.615
–1.615
Vdc
Threshold Voltage
Logic 1
VOHA
2,4,13,15
(
2.
)
3,14
(
3.
)
13,15
(
2.
)
–1.080
–1.080
–1.080
–0.980
–0.980
–0.980
–0.910
–0.910
–0.910
Vdc
Threshold Voltage
Logic 0
VOLA
2,4,13,15
(
3.
)
3,14
(
2.
)
13,15
(
3.
)
–1.655
–1.655
–1.655
–1.630
–1.630
–1.630
–1.595
–1.595
–1.595
Vdc
Switching Times
(50
Load)
ns
Propagation
Delay
Clock Delays
t12+15+
t12+14+
t7+13+
t7+4+
t7+2+
t7+3+
t12+15–
t12+14–
t7+13–
t7+4–
t7+2–
t7+3–
t11+15+
t11+14–
t9+14+
t9+15–
t14+
t15+
t14–
t15–
fcount
15
14
13
4
2
3
1.4
1.4
1.4
1.4
1.4
1.4
5.0
5.0
5.2
5.2
5.2
5.2
1.5
1.5
1.5
1.5
1.5
1.5
3.5
3.5
3.5
3.5
3.5
3.5
4.8
4.8
5.0
5.0
5.0
5.0
1.5
1.5
1.5
1.5
1.5
1.5
5.3
5.3
5.5
5.5
5.5
5.5
15
14
13
4
2
3
1.4
1.4
1.4
1.4
1.4
1.4
5.0
5.0
5.2
5.2
5.2
5.2
1.5
1.5
1.5
1.5
1.5
1.5
3.5
3.5
3.5
3.5
3.5
3.5
4.8
4.8
5.0
5.0
5.0
5.0
1.5
1.5
1.5
1.5
1.5
1.5
5.3
5.3
5.5
5.5
5.5
5.5
Set Delay
15
14
1.4
1.4
5.2
5.2
1.5
1.5
5.0
5.0
1.5
1.5
5.5
5.5
Reset Delay
14
15
1.4
1.4
5.2
5.2
1.5
1.5
5.0
5.0
1.5
1.5
5.5
5.5
Rise Time
(20 to 80%)
14
15
1.1
1.1
4.7
4.7
1.1
1.1
2.5
2.5
4.5
4.5
1.1
1.1
5.0
5.0
Fall Time
(20 to 80%)
14
15
1.1
1.1
4.7
4.7
1.1
1.1
2.5
2.5
4.5
4.5
1.1
1.1
5.0
5.0
Counting Frequency
2
15
125
125
125
125
150
150
125
125
MHz
1. Individually test each input; apply VILmin to pin under test.
2. Set all four flip–flops by applying pulse
VIHmax
VILmin
VIHmax
VILmin
to pins 5, 6, 10, and 11 prior to applying test voltage indicated.
3. Reset all four flip–flops by applying pulse
to pin 9 prior to applying test voltage indicated.
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