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参数资料
| 型号： | MC10197FN |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 门电路 |
| 英文描述： | 10K SERIES, HEX 1-INPUT NON-INVERT GATE, PQCC20 |
| 封装： | PLASTIC, LCC-20 |
| 文件页数： | 2/4页 |
| 文件大小： | 82K |
| 代理商： | MC10197FN |
MC10197
http://onsemi.com
2
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Under
–30
°C
+25
°C
+85
°C
Characteristic
Symbol
Under
Test
Min
Max
Min
Typ
Max
Min
Max
Unit
Power Supply Drain Current
IE
8
54
39
49
54
mAdc
Input Current
IinH
5
9
425
460
265
290
265
290
Adc
IinL
5
0.5
0.3
Adc
Output Voltage
Logic 1
VOH
2
–1.060
–0.890
–0.960
–0.810
–0.890
–0.700
Vdc
Output Voltage
Logic 0
VOL
2
–1.890
–1.675
–1.850
–1.650
–1.825
–1.615
Vdc
Threshold Voltage
Logic 1
VOHA
2
–1.080
–0.980
–0.910
Vdc
Threshold Voltage
Logic 0
VOLA
2
–1.655
–1.630
–1.595
Vdc
Switching Times (50
Load)
ns
Propagation Delay
t5+2+
t9+2+
2
1.1
4.2
5.3
1.1
2.8
3.5
4.0
5.0
1.1
4.4
5.5
Rise Time
(20 to 80%)
t2+
2
1.1
4.7
1.1
2.5
4.5
1.1
5.0
Fall Time
(20 to 80%)
t2–
2
1.1
4.7
1.1
2.5
4.5
1.1
5.0
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature
VIHmax
VILmin
VIHAmin
VILAmax
VEE
–30
°C
–0.890
–1.890
–1.205
–1.500
–5.2
+25
°C
–0.810
–1.850
–1.105
–1.475
–5.2
+85
°C
–0.700
–1.825
–1.035
–1.440
–5.2
Pin
Under
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(V
)
Characteristic
Symbol
Under
Test
VIHmax
VILmin
VIHAmin
VILAmax
VEE
(VCC)
Gnd
Power Supply Drain Current
IE
8
1, 16
Input Current
IinH
5
9
5
9
8
1, 16
IinL
5
8
1, 16
Output Voltage
Logic 1
VOH
2
5, 9
8
1, 16
Output Voltage
Logic 0
VOL
2
8
1, 16
Threshold Voltage
Logic 1
VOHA
2
9
5
8
1, 16
Threshold Voltage
Logic 0
VOLA
2
9
5
8
1, 16
Switching Times
(50
Load)
+1.11V
Pulse In
Pulse Out
–3.2 V
+2.0 V
Propagation Delay
t5+2+
t9+2+
2
9
5
9
2
8
1, 16
Rise Time
(20 to 80%)
t2+
2
9
5
2
8
1, 16
Fall Time
(20 to 80%)
t2–
2
9
5
2
8
1, 16
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
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