参数资料
型号: MC10E1651L
厂商: ON Semiconductor
文件页数: 4/9页
文件大小: 0K
描述: IC COMPARATOR DUAL ECL 16-CDIP
标准包装: 25
系列: MOSAIC III™
类型: 带锁销
元件数: 2
输出类型: 差分,ECL
电流 - 输出(标准): 100mA
电流 - 静态(最大值): 50mA
传输延迟(最大): 1.075ns
磁滞: 27mV
工作温度: 0°C ~ 85°C
封装/外壳: 16-CDIP(0.300",7.62mm)
安装类型: 通孔
包装: 管件
MC10E1651
http://onsemi.com
4
Table 5. AC CHARACTERISTICS VCC = +5.0 V ±5%; VEE = 5.2 V ±5%, GND = 0 V (Note 4)
Symbol
Characteristic
0°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fMAX
Maximum Toggle Frequency
TBD
> 1.0
TBD
GHz
tPLH
tPHL
Propagation Delay to Output (Note 4)
V to Q
LEN to Q
750
550
900
725
1050
900
775
550
925
750
1075
900
850
650
1025
825
1200
1000
ps
ts
Setup Time V
450
300
450
300
550
350
ps
th
Enable Hold Time V
50
250
50
250
100
250
ps
tpw
Minimum Pulse Width LEN
400
ps
tskew
Within Device Skew (Note 5)
15
ps
tJITTER
CycletoCycle Jitter
TBD
ps
TDE
Delay Dispersion
(ECL Levels) (Notes 6, 7)
(Notes 6, 8)
100
60
ps
TDL
Delay Dispersion
(TTL Levels) (Notes 9, 10)
(Notes 8, 9)
350
100
ps
tr
tf
Rise/Fall Times
(20-80%)
225
325
475
225
325
475
250
375
500
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Input VIL and VIH parameters vary 1:1 with VCC, output VOH and VOL parameters vary 1:1 with GND.
5. tskew is the propagation delay skew between comparator A and comparator B for a particular part under identical input conditions.
6. Refer to figure 4 and note that the input is at 850mV ECL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
7. The slew rate is 0.25 V/NS for input rising edges.
8. The slew rate is 0.75 V/NS for input rising edges.
9. Refer to Figure 5 and note that the input is at 2.5 V TTL levels with the input threshold range between the 20% and 80% points. The delay
is measured from the crosspoint of the input signal and the threshold value to the crosspoint of the Q and Q output signals.
10.The slew rate is 0.3 V/NS for input rising edges.
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