参数资料
型号: MC10E336FNR2
厂商: ON SEMICONDUCTOR
元件分类: 总线收发器
英文描述: 10E SERIES, 3-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQCC28
封装: PLASTIC, LCC-28
文件页数: 1/8页
文件大小: 71K
代理商: MC10E336FNR2
Semiconductor Components Industries, LLC, 2000
October, 2000 – Rev. 3
1
Publication Order Number:
MC10E336/D
MC10E336, MC100E336
5VECL 3Bit Registered
Bus Transceiver
The MC10E/MC100E336 contains three bus transceivers with both
transmit and receive registers. The bus outputs (BUS0–BUS2) are
specified for driving a 25
bus; the receive outputs (Q0 – Q2) are
specified for 50
. The bus outputs feature a normal HIGH level (VOH)
and a cutoff LOW level — when LOW, the outputs go to –2.0 V and the
output emitter-follower is “off”, presenting a high impedance to the bus.
The bus outputs also feature edge slow-down capacitors.
The Transmit Enable pins (TEN) control whether current data is
held in the transmit register, or new data is loaded from the A/B inputs.
A LOW on both of the Bus Enable inputs (BUSEN), when clocked
through the register, disables the bus outputs to –2.0 V.
The receiver section clocks bus data into the receive registers, after
gating with the Receive Enable (RXEN) input.
All registers are clocked by a positive transition of CLK1 or CLK2
(or both).
Additional leadframe grounding is provided through the Ground
pins (GND) which should be connected to 0 V. The GND pins are not
electrically connected to the chip.
The 100 Series contains temperature compensation.
25 Cutoff Bus Outputs
50 Receiver Outputs
Transmit and Receive Registers
1500 ps Max. Clock to Bus
1000 ps Max. Clock to Q
Bus Outputs Feature Internal Edge Slow-Down Capacitors
Additional Package Ground Pins
PECL Mode Operating Range: V
CC= 4.2 V to 5.7 V
with VEE= 0 V
NECL Mode Operating Range: V
CC= 0 V
with VEE= –4.2 V to –5.7 V
Internal Input Pulldown Resistors
ESD Protection: > 1 KV HBM, > 75 V MM
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
Transistor Count = 430 devices
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10E336FN
PLCC–28
37 Units/Rail
MC10E336FNR2
PLCC–28
500 Units/Reel
MC100E336FN
PLCC–28
37 Units/Rail
MC100E336FNR2
PLCC–28
500 Units/Reel
MARKING
DIAGRAMS
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
PLCC–28
FN SUFFIX
CASE 776
MC10E336FN
AWLYYWW
MC100E336FN
AWLYYWW
1
28
1
28
相关PDF资料
PDF描述
MC10E336FN 10E SERIES, 3-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQCC28
MC10E337FNR2 10E SERIES, 3-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PQCC28
MC10E411FNR2 10E SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 9 INVERTED OUTPUT(S), PQCC28
MC10E445FNR2 10E SERIES, 4-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PQCC28
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