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参数资料
| 型号： | MC10EP56DT |
| 厂商： | MOTOROLA INC |
| 元件分类： | 编、解码器及复用、解复用 |
| 英文描述： | 10E SERIES, DUAL 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO20 |
| 封装： | PLASTIC, TSSOP-20 |
| 文件页数： | 1/5页 |
| 文件大小： | 109K |
| 代理商： | MC10EP56DT |
1
Motorola, Inc. 1999
Product Preview
Dual Differential 2:1
Multiplexer
350ps Typical Propagation Delays
Maximum Frequency > 4.0GHz
20–Lead SOIC Wide Package
PECL mode: 3.0V to 5.5V VCC with VEE = 0V
ECL mode: 0V VCC with VEE = –3.0V to –5.5V
Separate and Common Select
Internal Input Resistors: Pulldown on D, D
Q Output will default LOW with inputs open or at VEE
ESD Protection: >4KV HBM, >200V MM
VBB Outputs
New Differential Input Common Mode Range
Moisture Sensitivity Level 1, Indefinite Time Out of Drypack
Flammability Rating: UL–94 code V–0 @ 1/8”, Oxygen Index
28 to 34
Transistor Count = 140 devices
The MC10EP56 is a dual, fully differential 2:1. The differential data path makes the device ideal for multiplexing
low skew clock or other skew sensitive signals. Multiple VBB pins are provided to ease AC coupling of input signals. If
used, the VBB output should be bypassed to ground with a 0.01F capacitor.
The device features both individual and common select inputs to address both data path and random logic applica-
tions.
This document contains information on a product under development. Motorola reserves the right to change or
discontinue this product without notice.
MC10EP56
PIN
FUNCTION
D0a–D1a
ECL Input Data a
D0a–D1a
ECL Input Data a Invert
D0b–D1b
ECL Input Data b
D0b–D1b
ECL Input Data b Invert
SEL0–SEL1
ECL Indiv. Select Input
COM_SEL
ECL Common Select Input
VBB0, VBB1
Output Reference Voltage
Q0–Q1
ECL True Outputs
Q0–Q1
ECL Inverted Outputs
PIN DESCRIPTION
SO–20, DT SUFFIX
20 PIN PLASTIC TSSOP PACKAGE
CASE 948E
SEL0
X
L
H
TRUTH TABLE
Q0,
Q0
a
b
a
ORDERING INFORMATION
MC10EP56DT
TSSOP
SEL1
X
L
H
L
COM_SEL
H
L
Q1,
Q1
a
b
a
b
MOTOROLA
Semiconductor Components
Order Number: MC10EP56/D
Rev. 0.2, 06/1999
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