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参数资料
| 型号： | MC13214R2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, BGA71 |
| 封装： | 9 X 9 MM, 1 MM HEIGHT, ROHS COMPLIANT, LGA-71 |
| 文件页数： | 11/70页 |
| 文件大小： | 802K |
| 代理商： | MC13214R2 |
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MC13211/212/213/214 Technical Data, Rev. 0.0,
Freescale Semiconductor
19
In streaming mode, the data is fed to the 802.15.4 modem on a word-by-word basis with an interrupt
serving as a notification that the 802.15.4 modem is ready for more data. This continues until the whole
packet is transmitted.
In both modes, a two-byte FCS is calculated in hardware from the payload data and appended to the packet.
This done without intervention from the user.
4.6
Functional Description
4.6.1
802.15.4 Modem Operational Modes
The 802.15.4 modem has a number of operational modes that allow for low-current operation. Transition
from the Off to Idle mode occurs when M_RST is negated. Once in Idle, the SPI is active and is used to
control the IC. Transition to Hibernate and Doze modes is enabled via the SPI. These modes are
summarized, along with the transition times, in Table 5. Current drain in the various modes is listed in
Table 8, DC Electrical Characteristics.
4.6.2
Serial Peripheral Interface (SPI)
The MCU directs the 802.15.4 modem, checks its status, and reads/writes data to the device through the
4-wire SPI port. The transceiver operates as a SPI slave device only. A transaction between the host and
the 802.15.4 modem occurs as multiple 8-bit bursts on the SPI. The modem SPI signals are:
1. Chip Enable (CE) - A transaction on the SPI port is framed by the active low CE input signal. A
transaction is a minimum of 3 SPI bursts and can extend to a greater number of bursts.
2. SPI Clock (SPICLK) - The host drives the SPICLK input to the 802.15.4 modem. Data is clocked
into the master or slave on the leading (rising) edge of the return-to-zero SPICLK and data out
changes state on the trailing (falling) edge of SPICLK.
Table 5. 802.15.4 Modem Mode Definitions and Transition Times
Mode
Definition
Transition Time
To or From Idle
Off
All IC functions Off, Leakage only. M_RST asserted. Digital outputs are tri-stated
including IRQ
10 - 25 ms to Idle
Hibernate
Crystal Reference Oscillator Off. (SPI not functional.) IC Responds to ATTN. Data
is retained.
7 - 20 ms to Idle
Doze
Crystal Reference Oscillator On but CLKO output available only if Register 7, Bit 9
= 1 for frequencies of 1 MHz or less. (SPI not functional.) Responds to ATTN and
can be programmed to enter Idle Mode through an internal timer comparator.
(300 + 1/CLKO) s to Idle
Idle
Crystal Reference Oscillator On with CLKO output available. SPI active.
Receive
Crystal Reference Oscillator On. Receiver On.
144 s from Idle
Transmit
Crystal Reference Oscillator On. Transmitter On.
144 s from Idle
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| MC1321X | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述: |
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