参数资料
型号: MC14022BD
厂商: MOTOROLA INC
元件分类: 计数器
英文描述: 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT UP RING COUNTER, PDSO16
封装: PLASTIC, SOIC-16
文件页数: 1/7页
文件大小: 262K
代理商: MC14022BD
MOTOROLA CMOS LOGIC DATA
93
MC14022B
Octal Counter
The MC14022B is a four–stage Johnson octal counter with built–in code
converter. High–speed operation and spike–free outputs are obtained by
use of a Johnson octal counter design. The eight decoded outputs are
normally low, and go high only at their appropriate octal time period. The
output changes occur on the positive–going edge of the clock pulse. This
part can be used in frequency division applications as well as octal counter
or octal decode display applications.
Fully Static Operation
DC Clock Input Circuit Allows Slow Rise Times
Carry Out Output for Cascading
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4022B
Triple Diode Protection on All Inputs
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
V
lin, lout
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PD
Power Dissipation, per Package
500
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/
_C From 100_C To 125_C
LOGIC DIAGRAM
11
1
5
7
Q4
Q1
Q6
Q3
12
14
13
CLOCK
ENABLE
RESET
15
VSS
VDD
Q0
Q5
Q2
Q7
2
4
3
10
CARRY
C
DR
Q
C
DR
Q
C
DR
Q
C
DR
Q
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
REV 3
1/94
MC14021B
See Page 6-37
MC14022B
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBD
SOIC
TA = – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
BLOCK DIAGRAM
FUNCTIONAL TRUTH TABLE
(Positive Logic)
Clock
Enable
Reset
Output=n
0
X
0
n
X
1
0
n
0
n+1
X
0
n
1
0
n+1
X
0
n
X
1
Q0
X = Don’t Care. If n < 4 Carry = 1,
Otherwise = 0.
12
10
5
4
11
7
3
1
2
Cout
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
14
13
15
CLOCK
ENABLE
RESET
VDD = PIN 16
VSS = PIN 8
NC = PIN 6, 9
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