参数资料
型号: MC14049UBD
厂商: MOTOROLA INC
元件分类: 门电路
英文描述: 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, PDSO16
封装: PLASTIC, SOIC-16
文件页数: 4/6页
文件大小: 209K
代理商: MC14049UBD
MOTOROLA CMOS LOGIC DATA
MC14049UB
4
Figure 2. Typical Output Source Characteristics
Figure 3. Typical Output Sink Characteristics
VDD
VSS
1
8
IOH
VOH
VDS = VOH – VDD
VDD
VSS
1
8
IOL
VOL
VDD = VOL
I OH
,OUTPUT
SOURCE
CURRNT
(mAdc)
I OL
,OUTPUT
SINK
CURRENT
(mAdc)
– 50
– 40
– 30
– 20
– 10
0
– 10
– 8.0
– 6.0
– 4.0
– 2.0
0
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
VGS = 5.0 Vdc
VGS = 10 Vdc
MAXIMUM CURRENT LEVEL
VGS = 15 Vdc
160
120
80
40
0
2.0
4.0
6.0
8.0
10
VDS, DRAIN–TO–SOURCE VOLTAGE (Vdc)
VGS = 15 Vdc
VGS = 10 Vdc
MAXIMUM CURRENT LEVEL
VGS = 5.0 Vdc
Figure 4. Ambient Temperature Power Derating
P
D
,MAXIMUM
POWER
DISSIP
A
TION
(mW)
PER
P
ACKAGE
1200
1100
1000
900
825
800
740
700
600
500
400
300
200
100
0
175
150
125
100
75
50
25
TA, AMBIENT TEMPERATURE (°C)
260 mW (L)
175 mW (P)
120 mW (D)
(L) CERAMIC
(P) PDIP
(D) SOIC
PULSE
GENERATOR
VDD
VSS
8
1
CL
Vout
Vin
20 ns
VDD
VSS
VOH
VOL
90%
50%
10%
90%
50%
10%
tPLH
tTLH
tTHL
tPHL
OUTPUT
INPUT
Figure 5. Switching Time Test Circuit
and Waveforms
This device contains circuitry to protect the inputs against damage
due to high static voltages or electric fields referenced to the VSS pin,
only. Extra precautions must be taken to avoid applications of any volt-
age higher than the maximum rated voltages to this high-impedance cir-
cuit.For proper operation, the ranges VSS≤Vin≤18VandVSS≤Vout≤VDD
are recommended.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
OUTE
NC
INF
OUTF
NC
IND
OUTD
INE
OUTB
INA
OUTA
VDD
VSS
INC
OUTC
INB
NC = NO CONNECTION
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