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| 型号： | MC14051BFG |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/12页 |
| 文件大小： | 0K |
| 描述： | IC MUX/DEMUX 8X1 16SOEIAJ |
| 标准包装： | 50 |
| 系列： | 4000B |
| 功能： | 多路复用器/多路分解器 |
| 电路： | SP8T |
| 导通状态电阻： | 280 欧姆 |
| 电压电源： | 双电源 |
| 电压 - 电源，单路/双路(±)： | ±3 V ~ 18 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 16-SOEIAJ |
| 包装： | 管件 |
| 其它名称： | MC14051BFG-ND MC14051BFGOS |
MC14051B, MC14052B, MC14053B
http://onsemi.com
8
APPLICATIONS INFORMATION
Figure A illustrates use of the onchip level converter
detailed in Figures 2, 3, and 4. The 0to5 V Digital Control
signal is used to directly control a 9 Vpp analog signal.
The digital control logic levels are determined by VDD
and VSS. The VDD voltage is the logic high voltage; the VSS
voltage is logic low. For the example, VDD = + 5 V = logic
high at the control inputs; VSS = GND = 0 V = logic low.
The maximum analog signal level is determined by VDD
and VEE. The VDD voltage determines the maximum
recommended peak above VSS. The VEE voltage
determines the maximum swing below VSS. For the
example, VDD VSS = 5 V maximum swing above VSS;
VSS VEE = 5 V maximum swing below VSS. The example
shows a
± 4.5 V signal which allows a 1/2 volt margin at each
peak. If voltage transients above VDD and/or below VEE are
anticipated on the analog channels, external diodes (Dx) are
recommended as shown in Figure B. These diodes should be
small signal types able to absorb the maximum anticipated
current surges during clipping.
The absolute maximum potential difference between
VDD and VEE is 18.0 V. Most parameters are specified up to
15 V which is the recommended maximum difference
between VDD and VEE.
Balanced supplies are not required. However, VSS must
be greater than or equal to VEE. For example, VDD = + 10
V, VSS = + 5 V, and VEE – 3 V is acceptable. See the Table
below.
Figure A. Application Example
+5 V
- 5 V
VDD
VSS
VEE
9 Vp-p
ANALOG SIGNAL
0-TO-5 V DIGITAL
CONTROL SIGNALS
SWITCH
I/O
INHIBIT,
A, B, C
COMMON
O/I
9 Vp-p
ANALOG SIGNAL
+ 4.5 V
4.5 V
GND
+5 V
EXTERNAL
CMOS
DIGITAL
CIRCUITRY
MC14051B
MC14052B
MC14053B
Figure B. External Germanium or Schottky Clipping Diodes
VDD
VEE
DX
ANALOG
I/O
COMMON
O/I
POSSIBLE SUPPLY CONNECTIONS
VDD
In Volts
VSS
In Volts
VEE
In Volts
Control Inputs
Logic High/Logic Low
In Volts
Maximum Analog Signal Range
In Volts
+ 8
0
– 8
+ 8/0
+ 8 to – 8 = 16 Vp–p
+ 5
0
– 12
+ 5/0
+ 5 to – 12 = 17 Vp–p
+ 5
0
0
+ 5/0
+ 5 to 0 = 5 Vp–p
+ 5
0
– 5
+ 5/0
+ 5 to – 5 = 10 Vp–p
+ 10
+ 5
– 5
+ 10/ + 5
+ 10 to – 5 = 15 Vp–p
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相关代理商/技术参数 |
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