参数资料
型号: MC14069UBDR2G
厂商: ON Semiconductor
文件页数: 1/7页
文件大小: 0K
描述: IC INVERTER HEX CMOS 14SOIC
标准包装: 1
系列: 4000B
逻辑类型: 反相器
电路数: 6
输入数: 1
电源电压: 3 V ~ 18 V
电流 - 静态(最大值): 1µA
输出电流高,低: 8.8mA,8.8mA
逻辑电平 - 低: 1 V ~ 2.5 V
逻辑电平 - 高: 4 V ~ 12.5 V
额定电压和最大 CL 时的最大传播延迟: 55ns @ 15V,50pF
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
供应商设备封装: 14-SOICN
封装/外壳: 14-SOIC(0.154",3.90mm 宽)
包装: 标准包装
产品目录页面: 1125 (CN2011-ZH PDF)
其它名称: MC14069UBDR2GOSDKR
Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 10
1
Publication Order Number:
MC14069UB/D
MC14069UB
Hex Inverter
The MC14069UB hex inverter is constructed with MOS Pchannel
and Nchannel enhancement mode devices in a single monolithic
structure. These inverters find primary use where low power
dissipation and/or high noise immunity is desired. Each of the six
inverters is a single stage to minimize propagation delays.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two LowPower TTL Loads or One
LowPower Schottky TTL Load Over the Rated Temperature
Range
Triple Diode Protection on All Inputs
PinforPin Replacement for CD4069UB
Meets JEDEC UB Specifications
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
0.5 to +18.0
V
Vin, Vout Input or Output Voltage Range
(DC or Transient)
0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
±10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
55 to +125
°C
Tstg
Storage Temperature Range
65 to +150
°C
TL
Lead Temperature
(8Second Soldering)
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
MARKING
DIAGRAMS
1
14
PDIP14
P SUFFIX
CASE 646
MC14069UBCP
AWLYYWWG
SOIC14
D SUFFIX
CASE 751A
TSSOP14
DT SUFFIX
CASE 948G
1
14
14069UG
AWLYWW
14
069U
ALYWG
G
1
14
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= PbFree Package
SOEIAJ14
F SUFFIX
CASE 965
1
14
MC14069UB
ALYWG
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
(Note: Microdot may be in either location)
G
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