参数资料
型号: MC14094BDTR2
厂商: ON Semiconductor
文件页数: 4/10页
文件大小: 0K
描述: IC SHIFT REGISTER 8STAGE 16TSSOP
产品变化通告: Product Obsolescence 24/Jan/2011
标准包装: 2,500
系列: 4000B
逻辑类型: 移位寄存器
输出类型: 三态
元件数: 1
每个元件的位元数: 8
功能: 串行至并行
电源电压: 3 V ~ 18 V
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 带卷 (TR)
MC14094B
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic
Symbol
VDD
Vdc
55_C
25_C
125_C
Unit
Min
Max
Min
Typ (2)
Max
Min
Max
Output Voltage
“0” Level
Vin = VDD or 0
“1” Level
Vin = 0 or VDD
VOL
5.0
10
15
0.05
0
0.05
0.05
Vdc
VOH
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
5.0
10
15
4.95
9.95
14.95
Vdc
Input Voltage
“0” Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
“1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
VIL
5.0
10
15
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
Vdc
VIH
5.0
10
15
3.5
7.0
11
3.5
7.0
11
2.75
5.50
8.25
3.5
7.0
11
Vdc
Output Drive Current
(VOH = 2.5 Vdc)
Source
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
(VOL = 0.4 Vdc)
Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
IOH
5.0
10
15
– 3.0
– 0.64
– 1.6
– 4.2
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
– 1.7
– 0.36
– 0.9
– 2.4
mAdc
IOL
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mAdc
Input Current
Iin
15
±0.1
±0.00001
±0.1
±1.0
mAdc
Input Capacitance
(Vin = 0)
Cin
5.0
7.5
pF
Quiescent Current
(Per Package)
IDD
5.0
10
15
5.0
10
20
0.005
0.010
0.015
5.0
10
20
150
300
600
mAdc
Total Supply Current (3) (4)
(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)
IT
5.0
10
15
IT = (4.1 mA/kHz) f + IDD
IT = (14 mA/kHz) f + IDD
IT = (140 mA/kHz) f + IDD
mAdc
3State Output Leakage Current
ITL
15
±0.1
±0.0001
±0.1
±3.0
mA
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
4. To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in mA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001.
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