参数资料
型号: MC33161DG
厂商: ON Semiconductor
文件页数: 9/18页
文件大小: 0K
描述: IC VOLTAGE MONITOR UNIV 8-SOIC
标准包装: 98
类型: 多压监控器
监视电压数目: 2
输出: 开路漏极或开路集电极
电压 - 阀值: 可调节/可选择
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 管件
产品目录页面: 1128 (CN2011-ZH PDF)
其它名称: MC33161DG-ND
MC33161DGOS
MC34161, MC33161, NCV33161
V CC
8
2.54V
GND
R 2
1
Reference
-
V 1
Input -V S
V 2
Output V CC
Voltage
Pins 5, 6 GND
V Hys
LED `ON'
-V S1
-V S2
R1
R 2
R1
7
2 +
3 +
+
-
1.27V
+
-
+
+
+
2.8V
-
+
0.6V
6
5
1.27V
4
The above figure shows the MC34161 configured as a dual negative overvoltage detector. As the input voltage increases from ground, the LED will turn ‘ON’ when
? V S1 or ? V S2 exceeds V 2 . With the dashed line output connection, the circuit becomes a dual negative undervoltage detector. As the input voltage decreases from
the peak towards ground, the LED will turn ‘ON’ when ? V S1 or ? V S2 falls below V 1 .
For known resistor values, the voltage trip points are:
For a specific trip voltage, the required resistor ratio is:
V 1 +
R 1
R 2
(V th * V ref ) ) V th
V 2 +
R 1
R 2
(V th * V H * V ref ) ) V th * V H
R 1
R 2
+
V 1 * V th
V th * V ref
R 1
R 2
+
V 2 * V th ) V H
V th * V H * V ref
Figure 18. Dual Negative Overvoltage Detector
V CC
8
2.54V
GND
R 2
1
Reference
-
V 1
Input -V S
V 2
Output V CC
Voltage
Pins 5, 6 GND
V Hys
LED `ON'
-V S1
-V S2
R1
R 2
R1
7
2 +
3 +
+
-
1.27V
+
-
1.27V
+
+
+
2.8V
-
+
0.6V
6
5
4
The above figure shows the MC34161 configured as a dual negative undervoltage detector. As the input voltage decreases towards ground, the LED will turn ‘ON’
when ? V S1 or ? V S2 falls below V 1 . With the dashed line output connection, the circuit becomes a dual negative overvoltage detector. As the input voltage increases
from ground, the LED will turn ‘ON’ when ? V S1 or ? V S2 exceeds V 2 .
For known resistor values, the voltage trip points are:
For a specific trip voltage, the required resistor ratio is:
V 1 +
R 1
R 2
(V th * V ref ) ) V th
V 2 +
R 1
R 2
(V th * V H * V ref ) ) V th * V H
R 1
R 2
+
V 1 * V th
V th * V ref
R 1
R 2
+
V 2 * V th ) V H
V th * V H * V ref
Figure 19. Dual Negative Undervoltage Detector
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