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参数资料
型号： MC33702
厂商： 飞思卡尔半导体(中国)有限公司
英文描述： 3.0 A Switch-Mode Power Supply with Linear Regulator(3.0 A开关方式电源，带线性稳压器)
中文描述： 3.0开关模式电源，线性稳压器（3.0甲开关方式电源，带线性稳压器）
文件页数： 17/24页
文件大小： 841K
代理商： MC33702
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33702
17
Inverted Power Sequencing Control
Comparators monitor voltage differences between the
switcher (V
OUT
pin) and LDO (LDO pin) outputs as follows:
1.
V
OUT
> LDO + 1.8 V, turn off V
OUT
.
The switcher V
OUT
can be forced off. This occurs whenever the V
OUT
output
voltage exceeds the LDO output voltage by more than
1.8 V.
2.
V
OUT
> LDO + 1.9 V, shunt V
OUT
to ground.
If turning off
the switcher V
OUT
is insufficient and the V
OUT
output
voltage exceeds the LDO output voltage by more than
1.9 V, a 1.0
shunt FET is turned on that discharges the
V
OUT
load capacitor to ground. The shunt FET is used for
LDO output shorts to ground and for power-down in case
of V
IN1
≠
V
IN2
with LDO output falling faster than the
V
OUT
.
3.
V
OUT
< LDO + 1.7 V, cancel (1) and (2) above, re-enable
V
OUT
.
Normal operation resumes when the V
OUT
output
voltage is less than 1.7 V above the LDO output voltage.
4.
V
OUT
< LDO - 0.2 V, turn off LDO.
The LDO can be
forced off. This occurs whenever the V
OUT
is less than
V
LDO
- 0.2 V.
5.
V
OUT
< LDO - 0.3 V, turn on the 1.0
LDO sink FET.
This occurs when the LDO output voltage exceeds the
V
OUT
output by more than 300 mV.
6.
V
OUT
> LDO, reset (4) and (5) above.
Normal operation
resumes when V
OUT
> LDO.
Standard Operating Mode
1. Single 3.3 V Supply, V
IN
= V
IN1
= V
IN2
= 3.3 V
The 3.3 V supplies the microprocessor I/O voltage, the
switcher supplies core voltage (e.g., 1.8 V nominal), and the
LDO operates independently (see
Figure 10
, page 15). Power
sequencing depends only on the normal switcher intrinsic
operation to control the Buck High-Side FET.
Power Up
When V
IN
is rising, initially V
OUT
will be below the regulation
point and the Buck High-Side FET will be on. In order not to
exceed the 2.0 V differential requirement between the I/O (V
IN
)
and the core (V
OUT
), the switcher must start up at 2.0 V or less
and be able to maintain the 2.0 V or less differential. The
maximum slew rate for V
IN
is 1.0 V/ms.
Power Down
When V
IN
is falling, V
OUT
will be below the regulation point;
therefore the Buck High-Side FET will be on. In the case where
V
OUT
is falling faster than V
IN
, the Buck High-Side FET will
attempt to maintain V
OUT
. In the case where V
IN
is falling faster
than V
OUT
, the Buck High-Side FET is also on, and the V
OUT
load capacitor will be discharged through the Buck High-Side
FET to V
IN
. Thus, provided V
IN
does not fall too fast, the core
voltage (V
OUT
) will not exceed the I/O voltage (V
IN
) by more
than a maximum of 0.4 V.
Shorted Load
1.
V
OUT
shorted to ground.
This will cause the I/O voltage to
exceed the core voltage by more than 2.0 V. No load
protection.
2.
V
IN
shorted to ground.
Until the switcher load
capacitance is discharged, the core voltage will exceed
the I/O voltage by more than 0.4 V. By the intrinsic
operation of the switcher, the load capacitor will be
discharged rapidly through the Buck High-Side FET to
V
IN
.
3.
V
OUT
shorted to supply.
No load protection. 33702
protected by current limit and thermal limit.
2. Single 5.0 V Supply, V
IN1
= V
IN2
, or Dual Supply V
IN1
≠
V
IN2
The LDO supplies the microprocessor I/O voltage. The
switcher supplies the core (e.g., 1.8 V nominal) (see
Figure 11
,
page 15).
Power Up
This condition depends upon the regulator current limit, load
current and capacitance, and the relative rise times of the V
IN1
and V
IN2
supplies. There are 2 cases:
1.
LDO rises faster than V
OUT
. The LDO uses control
methods (1) and (2) described in the
Methods of Control
section, page 16.
2.
V
OUT
rises faster than LDO.
The switcher uses control
methods (4) and (5) described in the
Methods of Control
section, page 16.
Power Down
This condition depends upon the regulator load current and
capacitance and the relative fall times of the V
IN1
and V
IN2
supplies. There are 2 cases:
1.
V
OUT
falls faster than LDO.
The LDO uses control
methods (1) and (2) described in the
Methods of Control
section, page 16.
In the case V
IN1
= V
IN2
, the intrinsic operation will turn on
both the Buck High-Side FET and the LDO external Pass
FET, and will discharge the LDO load capacitor into the V
IN
supply.
2.
LDO falls faster than V
OUT
.
The switcher uses control
methods (4) and (5) described in the
Methods of Control
section, page 16.
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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