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| 型号： | MC33897EFR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 14/19页 |
| 文件大小： | 0K |
| 描述： | IC TRANSCEIVER CAN S-W 14-SOIC |
| 标准包装： | 1 |
| 类型： | 收发器 |
| 驱动器/接收器数： | 1/1 |
| 规程： | CAN |
| 电源电压： | 12V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 14-SOICN |
| 包装： | 剪切带 (CT) |
| 其它名称： | MC33897EFR2CT |
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
33897
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33897 Pin Connections
Table 2. Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section, beginning on page 12.
33897 Pin
Pin Name
Formal Name
Definition
1, 7, 8, 14
GND
Ground
Electrical Common Ground and Heat removal. A good thermal path will also reduce
the die temperature.
2
TXD
Transmit Data
Data input here will appear on the BUS pin. A logic [0] will assert the bus, a logic [1]
will make the bus go to the recessive state.
3, 4
MODE0,
MODE1
Mode Control
These Pins control Sleep mode, Transmit Level, and Speed. They have weak pull-
downs.
5
RXD
Receive Data
Open drain output of the data on BUS. A recessive bus = a logic [1], a dominant bus
= logic [0]. An external pull-up is required.
6, 13
NC
No Connect
No internal connection to these Pins. Pin 13 can be connected to GND.
9
CNTL
Control
Provides a battery level logic signal.
10
VBATT
Battery
Power input. An external diode is needed for reverse battery protection.
11
LOAD
Load
The external bus load resistor connects here to prevent bus pull-up in the event of
loss of module ground.
12
BUS
Bus
This pin connects to the bus through external components.
GND
VBATT
CNTL
GND
NC
BUS
LOAD
GND
RXD
NC
GND
TXD
MODE0
MODE1
5
6
7
2
3
4
14
10
9
8
13
12
11
1
33897
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