参数资料
| 型号： | MC44608P75G |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/15页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO PWM 8-DIP |
| 产品变化通告： | Product Obsolescence 01/Jul/2009 |
| 标准包装： | 50 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 82kHz |
| 占空比： | 86% |
| 电源电压： | 6.6 V ~ 13 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 包装： | 管件 |
| 其它名称： | MC44608P75GOS |
MC44608
PIN FUNCTION DESCRIPTION
Pin
1
2
3
4
5
6
7
8
Name
Demag
I sense
Control Input
Ground
Driver
V CC
V i
Description
The Demag pin offers 3 different functions: Zero voltage crossing detection (50 mV), 24 m A current detection
and 120 m A current detection. The 24 m A level is used to detect the secondary reconfiguration status and the
120 m A level to detect an Over Voltage status called Quick OVP.
The Current Sense pin senses the voltage developed on the series resistor inserted in the source of the power
MOSFET. When I sense reaches 1.0 V, the Driver output (pin 5) is disabled. This is known as the Over Current
Protection function. A 200 m A current source is flowing out of the pin 3 during the startup phase and during the
switching phase in case of the Pulsed Mode of operation. A resistor can be inserted between the sense resistor
and the pin 2, thus a programmable peak current detection can be performed during the SMPS standby mode.
A feedback current from the secondary side of the SMPS via the Opto--coupler is injected into this pin. A
resistor can be connected between this pin and GND to allow the programming of the Burst duty cycle during
the standby mode.
This pin is the ground of the primary side of the SMPS.
The current and slew rate capability of this pin are suited to drive Power MOSFETs.
This pin is the positive supply of the IC. The driver output gets disabled when the voltage becomes higher than
15 V and the operating range is between 6.6 V and 13 V. An intermediate voltage level of 10 V creates a
disabling condition called Latched Off phase.
This pin is to provide isolation between the V i pin 8 and the V CC pin 6.
This pin can be directly connected to a 500 V voltage source for startup function of the IC. During the startup
phase a 9.0 mA current source is internally delivered to the V CC pin 6 allowing a rapid charge of the V CC
capacitor. As soon as the IC starts--up, this current source is disabled.
OPERATING DESCRIPTION
Regulation
The switch S3 is closed in standby mode during the
V CC
V LP--stby
Latched Off Phase while the switch S2 remains open. (See
section PULSED MODE DUTY CYCLE CONTROL).
Control
Input
3
1
S3
1
S2
0
0
V dd
&
Stand--by
Latched off Phase
Switching Phase
The resistor Rdpulsed (Rduty cycle burst) has no effect on
the regulation process. This resistor is used to determine the
burst duty cycle described in the chapter “Pulsed Duty Cycle
Control” on page 8.
PWM Latch
The MC44608 works in voltage mode. The on--time is
Regulation Comparator
5V
20 Ω
4 kHz
Filter
Output
PWM
1.6 V
controlled by the PWM comparator that compares the
oscillator sawtooth with the regulation block output (refer to
the block diagram on page 2).
The PWM latch is initialized by the oscillator and is reset
by the PWM comparator or by the current sense comparator
in case of an over current. This configuration ensures that
Figure 2. Regulator
The pin 3 senses the feedback current provided by the
Opto coupler. During the switching phase the switch S2 is
closed and the shunt regulator is accessible by the pin 3. The
shunt regulator voltage is typically 5.0 V. The dynamic
resistance of the shunt regulator represented by the zener
diode is 20 Ω . The gain of the Control input is given on
only a single pulse appears at the circuit output during an
oscillator cycle.
Current Sense
The inductor current is converted to a positive voltage by
inserting a ground reference sense resistor R Sense in series
with the power switch.
The maximum current sense threshold is fixed at 1.0 V.
The peak current is given by the following equation:
Figure 11 which shows the duty cycle as a function of the
current injected into the pin 3.
A 4.0 kHz filter network is inserted between the shunt
Ipk max =
1
R sense( Ω )
(A)
regulator and the PWM comparator to cancel the high
frequency residual noise.
http://onsemi.com
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