参数资料
型号: MC44BC374C
厂商: Motorola, Inc.
英文描述: PLL Tuned UHF and VHF Audio/Video High Integration Modulator
中文描述: 锁相环调谐UHF和VHF音频/视频高集成调制器
文件页数: 22/30页
文件大小: 915K
代理商: MC44BC374C
22
MC44BC373C/374C Technical Data
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
High Speed I2C Compatible Bus
14.3
Levels Definition
14.4
SCL
High Speed I
2
C Compatible Bus Format
14.5
The bus receiver operates the I
2
C compatible data format. The chip address (I
2
C bus) is:
I
2
C Write Mode Format and Bus Receiver
In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45) is an acknowledge bit (ACK) during which
the MCU sends a logic 1 and the Modulator circuit answers on the data line by pulling it low. Besides the
chip address, the circuit needs two or four data bytes for operation. The following sequences of data bytes
are the permitted incoming information:
After the chip address, two or four data bytes may be received.
If three data bytes are received, the third one is ignored.
If five or more data bytes are received, the fifth and following ones are ignored, and the last ACK
pulse is sent at the end of the fourth data byte.
1 1 0 0 1 0 1 0 (ACK) = $CA (hex) in write mode
Example 1
Example 2
Example 3
Example 4
STA
STA
STA
STA
CA
CA
CA
CA
C1
FM
C1
FM
C0
FL
C0
FL
STO
STO
FM
C1
FL
C0
STO
STO
With:
STA = Start condition
FM = Frequency information, high order bits
C1 = Control information, high order bits
STO = Stop condition
CA = Chip Address
FL = Frequency information, low order bits
CO = Control information, low order bits
SDA
...
0V
Vcc
Vih
Vil
dead band
1
2
3
4
5
6
7
8
9 10
14
11 12 13
45
44
15
19
16 17 18
STA
Chip Address ($CA)
ACK
ACK
First Data Byte (C1 or FM)
Data
ACK
Stop
SDA
F
n
.
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