参数资料
型号: MC56F8145VFGE
厂商: Freescale Semiconductor
文件页数: 101/172页
文件大小: 0K
描述: IC DSP 16BIT 40MHZ 128-LQFP
标准包装: 72
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 40MHz
连通性: EBI/EMI,SCI,SPI
外围设备: POR,PWM,WDT
输入/输出数: 49
程序存储器容量: 128KB(64K x 16)
程序存储器类型: 闪存
RAM 容量: 4K x 16
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 3.6 V
数据转换器: A/D 16x12b
振荡器型: 外部
工作温度: -40°C ~ 105°C
封装/外壳: 128-LQFP
包装: 托盘
产品目录页面: 734 (CN2011-ZH PDF)
56F8345 Technical Data, Rev. 17
34
Freescale Semiconductor
Preliminary
CAN_TX
120
Open
Drain
Output
Open
Drain
Output
FlexCAN Transmit Data — CAN output with internal pull-up
enable at reset.*
* Note: If a pin is configured as open drain output mode, internal
pull-up will automatically be disabled when it outputs low.
Internal pull-up will be enabled unless it has been manually
disabled by clearing the corresponding bit in the PUREN register
of the GPIO module, when it outputs high.
If a pin is configured as push-pull output mode, internal pull-up
will automatically be disabled, whether it outputs low or high.
TC0
(GPIOE8)
111
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
TC0 - 1 — Timer C, Channels 0 and 1
Port E GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pull-up resistor, clear the appropriate
bit of the GPIOE_PUR register. See Part 6.5.6 for details.
TC1
(GPIOE9)
113
TD0
(GPIOE10)
107
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
TD0 - TD3 — Timer D, Channels 0, 1, 2 and 3
Port E GPIO — These GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Timer functionality.
To deactivate the internal pull-up resistor, clear the appropriate
bit of the GPIOE_PUR register. See Part 6.5.6 for details.
TD1
(GPIOE11)
108
TD2
(GPIOE12)
109
TD3
(GPIOE13)
110
IRQA
52
Schmitt
Input
Input,
pull-up
enabled
External Interrupt Request A and B — The IRQA and IRQB
inputs are asynchronous external interrupt requests during Stop
and Wait mode operation. During other operating modes, they
are synchronized external interrupt requests, which indicate an
external device is requesting service. They can be programmed
to be level-sensitive or negative-edge triggered.
To deactivate the internal pull-up resistor, set the IRQ bit in the
SIM_PUDR register. See Part 6.5.6 for details.
IRQB
53
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
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