参数资料
型号: MC56F8346VFVE
厂商: Freescale Semiconductor
文件页数: 25/178页
文件大小: 0K
描述: IC DSP 16BIT 60MHZ 144-LQFP
标准包装: 60
系列: 56F8xxx
核心处理器: 56800E
芯体尺寸: 16-位
速度: 60MHz
连通性: CAN,EBI/EMI,SCI,SPI
外围设备: POR,PWM,温度传感器,WDT
输入/输出数: 62
程序存储器容量: 136KB(68K x 16)
程序存储器类型: 闪存
RAM 容量: 6K x 16
电压 - 电源 (Vcc/Vdd): 2.25 V ~ 3.6 V
数据转换器: A/D 16x12b
振荡器型: 外部
工作温度: -40°C ~ 105°C
封装/外壳: 144-LQFP
包装: 托盘
配用: MC56F8367EVME-ND - EVAL BOARD FOR MC56F83X
56F8346 Technical Data, Rev. 15
120
Freescale Semiconductor
Preliminary
Figure 6-11 GPIO Peripheral Select Register (SIM_GPS)
6.5.8.1
Reserved—Bits 15–4
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.8.2
GPIOC3 (C3)—Bit 3
This bit selects the alternate function for GPIOC3.
0 = HOME1/TB3 (default - see “Switch Matrix Mode” bits of the Quad Decoder DECCR register in the
56F8300 Peripheral User Manual)
1 = SS1
Table 6-2 Control of Pads Using SIM_GPS Control 1
1. This applies to the four pins that serve as Quad Decoder / Quad Timer / SPI / GPIOC functions. A separate set of control bits is
used for each pin.
Pin Function
Control Registers
Comments
GPIOC_PER
G
P
IOC_DTR
SIM_GPS
Qu
ad
T
ime
r
SCR
Re
gister
OEN
bi
ts
GPIO Input
0
GPIO Output
0
1
Quad Timer Input / Quad
Decoder Input 2
2. Reset configuration
1
0
See the “Switch Matrix for Inputs to the Timer”
table in the 56F8300 Peripheral User Manual
for the definition of the timer inputs based on
the Quad Decoder Mode configuration.
Quad Timer Output / Quad
Decoder Input 3
3. Quad Decoder pins are always inputs and function in conjunction with the Quad Timer pins.
1—
0
1
SPI input
1
1
See SPI controls for determining the direction
of each of the SPI pins.
SPI output
1
1
Base + $B
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
C3
C2
C1
C0
Write
RESET
00
0
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