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| 型号： | MC68332AMEH16 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 16 MHz, MICROCONTROLLER, PQFP132 |
| 封装： | 0.950 X 0.950 INCH, 0.025 INCH PITCH, PLASTIC, ROHS COMPLIANT, QFP-132 |
| 文件页数： | 31/109页 |
| 文件大小： | 787K |
| 代理商： | MC68332AMEH16 |
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MOTOROLA
MC68332
28
MC68332TS/D
3.4.8 Data Transfer Mechanism
The MCU architecture supports byte, word, and long-word operands, allowing access to 8- and 16-bit
data ports through the use of asynchronous cycles controlled by the data transfer and size acknowledge
inputs (DSACK1 and DSACK0).
3.4.9 Dynamic Bus Sizing
The MCU dynamically interprets the port size of the addressed device during each bus cycle, allowing
operand transfers to or from 8- and 16-bit ports. During an operand transfer cycle, the slave device sig-
nals its port size and indicates completion of the bus cycle to the MCU through the use of the DSACK0
and DSACK1 inputs, as shown in the following table.
For example, if the MCU is executing an instruction that reads a long-word operand from a 16-bit port,
the MCU latches the 16 bits of valid data and then runs another bus cycle to obtain the other 16 bits.
The operation for an 8-bit port is similar, but requires four read cycles. The addressed device uses the
DSACK0 and DSACK1 signals to indicate the port width. For instance, a 16-bit device always returns
DSACK0 = 1 and DSACK1 = 0 for a 16-bit port, regardless of whether the bus cycle is a byte or word
operation.
Dynamic bus sizing requires that the portion of the data bus used for a transfer to or from a particular
port size be fixed. A 16-bit port must reside on data bus bits [15:0] and an 8-bit port must reside on data
bus bits [15:8]. This minimizes the number of bus cycles needed to transfer data and ensures that the
MCU transfers valid data.
The MCU always attempts to transfer the maximum amount of data on all bus cycles. For a word oper-
ation, it is assumed that the port is 16 bits wide when the bus cycle begins. Operand bytes are desig-
nated as shown in the following figure. OP0 is the most significant byte of a long-word operand, and
OP3 is the least significant byte. The two bytes of a word-length operand are OP0 (most significant) and
OP1. The single byte of a byte-length operand is OP0.
Figure 8 Operand Byte Order
3.4.10 Operand Alignment
The data multiplexer establishes the necessary connections for different combinations of address and
data sizes. The multiplexer takes the two bytes of the 16-bit bus and routes them to their required po-
sitions. Positioning of bytes is determined by the size and address outputs. SIZ1 and SIZ0 indicate the
remaining number of bytes to be transferred during the current bus cycle. The number of bytes trans-
ferred is equal to or less than the size indicated by SIZ1 and SIZ0, depending on port width.
Table 10 Effect of DSACK Signals
DSACK1
DSACK0
Result
1
Insert Wait States in Current Bus Cycle
1
0
Complete Cycle —Data Bus Port Size is 8 Bits
0
1
Complete Cycle —Data Bus Port Size is 16 Bits
0
Reserved
Operand
Byte Order
31
24
23
16
15
8
7
0
Long Word
OP0
OP1
OP2
OP3
Three Byte
OP0
OP1
OP2
Word
OP0
OP1
Byte
OP0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68332AMEH20 | 功能描述:32位微控制器 - MCU 32B MCU 2KRAM TPU QSM RoHS:否 制造商:Texas Instruments 核心:C28x 处理器系列:TMS320F28x 数据总线宽度:32 bit 最大时钟频率:90 MHz 程序存储器大小:64 KB 数据 RAM 大小:26 KB 片上 ADC:Yes 工作电源电压:2.97 V to 3.63 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:LQFP-80 安装风格:SMD/SMT |
| MC68332AMFC16 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68332AMFC20 | 制造商:Freescale Semiconductor 功能描述: |
| MC68332AMFV16 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
| MC68332AMFV20 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:32-Bit Modular Microcontroller |
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