参数资料
型号: MC68HC05C8ACB
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
封装: SHRINK, PLASTIC, DIP-42
文件页数: 114/156页
文件大小: 755K
代理商: MC68HC05C8ACB
NON-DISCLOSURE
AGREEMENT
REQUIRED
Timer
General Release Specification
MC68HC05C8A Rev. 3.0
60
Timer
MOTOROLA
8.7 Timer Status Register
The TSR is a read-only register containing three status flag bits.
ICF — Input Capture Flag
1 = Flag set when selected polarity edge is sensed by input capture
edge detector
0 = Flag cleared when TSR and input capture low register ($15) are
accessed
OCF — Output Compare Flag
1 = Flag set when output compare register contents match the free-
running counter contents
0 = Flag cleared when TSR and output compare low register ($17)
are accessed
TOF — Timer Overflow Flag
1 = Flag set when free-running counter transition from $FFFF to
$0000 occurs
0 = Flag cleared when TSR and counter low register ($19) are
accessed
Bits 0–4 — Not used
Always read 0
Accessing the timer status register satisfies the first condition required
to clear status bits. The remaining step is to access the register
corresponding to the status bit.
Address:
$13
Bit 7
654321
Bit 0
Read:
ICF
OCF
TOF
00000
Write:
Reset:
U
00000
U = Unaffected
Figure 8-5. Timer Status Register (TSR)
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