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参数资料
| 型号： | MC68HC05SR3B |
| 厂商： | MOTOROLA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | SDIP-42 |
| 文件页数： | 27/96页 |
| 文件大小： | 612K |
| 代理商： | MC68HC05SR3B |
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MC68HC05SR3
MOTOROLA
4-1
MEMORY AND REGISTERS
4
MEMORY AND REGISTERS
The MC68HC05SR3/
MC68HC705SR3 has 8K-bytes of addressable memory, consisting of I/O
registers, user ROM/
EPROM, user RAM, and self-check/bootstrap ROM. Figure 4-1 shows the
memory map for MC68HC05SR3/
MC68HC705SR3 device.
4.1
I/O Registers
The I/O, status and control registers are located within the rst 16 bytes of memory, from $0000
to $000F. These are shown in the memory map in Figure 4-1; and a summary of the register
outline is shown in Table 4-1. Reading from unimplemented bits will return unknown states, and
writing to unimplemented bits will be ignored.
4.2
RAM
The user RAM (including the stack) consists of 192 bytes. It is separated into two blocks at
locations $0010 to $008F, and $00C0 to $00FF. The stack begins at address $00FF and proceeds
down to $00C0.
4.3
ROM
The user ROM consists of 3840 bytes of memory, from $1000 to $1EFF. Twelve bytes of user
vectors are also available, from $1FF4 to $1FFF.
On the MC68HC705SR3, this ROM is replaced
by EPROM.
Note:
Using the stack area for data storage or temporary work locations requires care to
prevent the data from being overwritten due to stacking from an interrupt or subroutine
call.
TPG
31
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相关代理商/技术参数 |
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| MC68HC05SU3A | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Fully static chip design featuring the industry standard 8-bit M68HC05 core |
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