Revision History
MC68HC908GT16 MC68HC908GT8 MC68HC08GT16 Data Sheet, Rev. 5.0
Freescale Semiconductor
5
September,
2004
3.0
(Continued
from
previous
page)
Chapter 15 System Integration Module (SIM) — Clarified SIM features and
functionality
179, 182,
183, 184
15.7.2 SIM Reset Status Register — Clarified SRSR operation
194
Table 19-1. Monitor Mode Signal Requirements and Options — Reworked
247
19.2.1 Functional Description — Corrected Break description
237, 240
19.3 Monitor Module (MON) — Reworked
243
Chapter 20 Electrical Specifications — Revised/added tables:
20.5 5.0-V DC Electrical Characteristics
20.6 3.0-V DC Electrical Characteristics
20.7 Supply Current Characteristics
20.8 5-V Control Timing
20.9 3-V Control Timing
257
258
259
260
260
20.20 Memory Characteristics — Updated memory table
273
Chapter 20 Electrical Specifications — Added figures:
Figure 20-1. RST and IRQ Timing
Figure 20-2. RST and IRQ Timing
260
260
March,
2006
4.0
Appendix A MC68HC08GT16 — Introduces the MC68HC08GT16, the ROM part
equivalent to the MC68HC908GT16.
281
April,
200
7
5.0
4.2 Functional Description
— In the description of the COP Rate Select Bit
corrected the values for COP timeout period
5
7
Figure 5-1. COP Block Diagram
— Replaced BUSCLKX4 with COPCLK
61
14.9.1 ESCI Arbiter Control Register
— Replaced one half with one quarter in
definition for ACLK = 0
176
14.9.3 Bit Time Measurement
— Replaced one half with one quarter in definition
for ACLK = 0
177
Revised the following diagrams:
Figure 19-10. Forced Monitor Mode (Low)
Figure 19-11. Forced Monitor Mode (High)
Figure 19-12. Standard Monitor Mode
245
245
246
Revision History (Sheet 2 of 2)
Date
Revision
Level
Description
Page
Number(s)