- 您现在的位置：买卖IC网 > PDF目录80443 > MC68HC11D3CFN1 (ABILIS SYSTEMS) 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PQCC44 PDF资料下载
参数资料
| 型号： | MC68HC11D3CFN1 |
| 厂商： | ABILIS SYSTEMS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 72/124页 |
| 文件大小： | 6875K |
| 代理商： | MC68HC11D3CFN1 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页当前第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页
RESETS AND INTERRUPTS
TECHNICAL DATA
5-7
The maskable interrupt sources have the following priority arrangement:
1. IRQ
2. Real-time interrupt
3. Timer input capture 1
4. Timer input capture 2
5. Timer input capture 3
6. Timer output compare 1
7. Timer output compare 2
8. Timer output compare 3
9. Timer output compare 4
10. Timer input capture 4/output compare 5
11. Timer overflow
12. Pulse accumulator overflow
13. Pulse accumulator input edge
14. SPI transfer complete
15. SCI system
Any one of these interrupts can be assigned the highest maskable interrupt priority by
writing the appropriate value to the PSEL bits in the HPRIO register. Otherwise, the
priority arrangement remains the same. An interrupt that is assigned highest priority is
still subject to global masking by the I bit in the CCR, or by any associated local bits.
Interrupt vectors are not affected by priority assignment. To avoid race conditions,
HPRIO can be written only while I-bit interrupts are inhibited.
5.3.1 Highest Priority Interrupt and Miscellaneous Register
The values of the RBOOT, SMOD, IRVNE, and MDA reset bits depend on the mode
during initialization. Refer to Table 5-3.
RBOOT — Read Bootstrap ROM
Has meaning only when the SMOD bit is a one (special bootstrap mode or special test
mode). At all other times this bit is clear and cannot be written. Refer to SECTION 4
OPERATING MODES AND ON-CHIP MEMORY for more information.
SMOD — Special Mode Select
This bit reflects the inverse of the MODB input pin at the rising edge of reset. Refer to
SECTION 4 OPERATING MODES AND ON-CHIP MEMORY for more information.
MDA — Mode Select A
The mode select A bit reflects the status of the MODA input pin at the rising edge of
reset. Refer to SECTION 4 OPERATING MODES AND ON-CHIP MEMORY for more
information.
IRVNE — Internal Read Visibility Enable/Not E
HPRIO — Highest Priority I-Bit Interrupt and Miscellaneous
$003C
Bit 7
654321
Bit 0
RBOOT
SMOD
MDA
IRVNE
PSEL3
PSEL2
PSEL1
PSEL0
RESET:
—
0101
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相关PDF资料 |
PDF描述 |
|---|---|
| M30260F3TGP-D3 | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP48 |
| M30263F6AFP-U9 | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO42 |
| M30263F6AFP | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO42 |
| M30302MCP-XXXFP | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| M30620FCMGP | 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP100 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MC68HC11D3CFN2 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:Microcontrollers |
| MC68HC11D3CFN3 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFN4 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFU | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
| MC68HC11D3CFU1 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:ROM-based high-performance microcontrollers |
发布紧急采购，3分钟左右您将得到回复。