参数资料
型号: MC68HC11F1CFN2
厂商: Freescale Semiconductor
文件页数: 92/158页
文件大小: 0K
描述: IC MCU 512 EEPROM 2MHZ 68-PLCC
标准包装: 18
系列: HC11
核心处理器: HC11
芯体尺寸: 8-位
速度: 2MHz
连通性: SCI,SPI
外围设备: POR,WDT
输入/输出数: 30
程序存储器类型: ROMless
EEPROM 大小: 512 x 8
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.75 V ~ 5.25 V
数据转换器: A/D 8x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 68-LCC(J 形引线)
包装: 管件
OPERATING MODES AND ON-CHIP MEMORY
TECHNICAL DATA
4-1
SECTION 4OPERATING MODES AND ON-CHIP MEMORY
This section contains information about the modes that define MC68HC11F1 operat-
ing conditions, and about the on-chip memory that allows the MCU to be configured
for various applications.
4.1 Operating Modes
The values of the mode select inputs MODB and MODA during reset determine the
operating mode. Single chip and expanded modes are the normal modes. In single-
chip mode only on-board resources are available. Expanded mode, however, allows
access to external memory or peripheral devices. Each of these two normal modes is
paired with a special mode. Bootstrap mode, a variation of the single-chip mode, exe-
cutes a bootloader program from an internal bootstrap ROM. Test mode allows privi-
leged access to internal resources.
4.1.1 Single-Chip Operating Mode
In single-chip operating mode, the MC68HC11F1 has no external address or data bus.
Ports B, C, and F are available for general-purpose I/O.
4.1.2 Expanded Operating Mode
In expanded operating mode, the MCU can access a 64-Kbyte physical address
space. The address space includes the same on-chip memory addresses used for sin-
gle-chip mode, in addition to external memory and peripheral devices.
The expansion bus is made up of ports B, C, F and the R/W signal. In expanded mode,
high order address bits are output on the port B pins, low order address bits on the port
F pins, and the data bus on port C. The R/W pin indicates the direction of data transfer
on the port C bus.
4.1.3 Special Test Mode
Special test mode, a variation of the expanded mode, is primarily used during Motor-
ola's internal production testing; however, it is accessible for programming the CON-
FIG register, programming calibration data into EEPROM, and supporting emulation
and debugging during development.
4.1.4 Special Bootstrap Mode
Bootstrap mode is a special variation of the single-chip mode. Bootstrap mode allows
special-purpose programs to be entered into internal RAM. When boot mode is select-
ed at reset, a small bootstrap ROM becomes present in the memory map. Reset and
interrupt vectors are located in bootstrap ROM at $BFC0–$BFFF. The MCU fetches
the reset vector, then executes the bootloader.
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