
Memory
FLASH-1 Memory (FLASH-1)
MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A
Data Sheet
MOTOROLA
Memory
53
9.
Clear the HVEN bit.
10.
Wait for a time, tRCV, (typically 1 s) after which the memory can be
accessed in normal read mode.
NOTES:
A. Programming and erasing of FLASH locations can not be performed by code
being executed from the same FLASH array.
B. While these operations must be performed in the order shown, other unrelated
operations may occur between the steps. However, care must be taken to
ensure that these operations do not access any address within the FLASH
array memory space such as the COP control register (COPCTL) at $FFFF.
C. It is highly recommended that interrupts be disabled during program/erase
operations.
In applications that require more than 1000 program/erase cycles, use the 4 ms
page erase specification to get improved long-term reliability. Any application can
use this 4 ms page erase specification. However, in applications where a FLASH
location will be erased and reprogrammed less than 1000 times, and speed is
important, use the 1 ms page erase specification to get a shorter cycle time.
2.6.6 FLASH-1 Program Operation
Programming of the FLASH-1 memory is done on a row basis. A row consists of
64 consecutive bytes with address ranges as follows:
$XX00 to $XX3F
$XX40 to $XX7F
$XX80 to $XXBF
$XXC0 to $XXFF
During the programming cycle, make sure that all addresses being written to fit
within one of the ranges specified above. Attempts to program addresses in
different row ranges in one programming cycle will fail.
Use this step-by-step procedure to program a row of FLASH-1 memory.
NOTE:
Only bytes which are currently $FF may be programmed.
1.
Set the PGM bit in the FLASH-1 control register (FL1CR). This configures
the memory for program operation and enables the latching of address and
data programming.
2.
Read the FLASH-1 block protect register (FL1BPR).
3.
Write to any FLASH-1 address within the row address range desired with
any data.
4.
Wait for time, tNVS (minimum 10 s).
5.
Set the HVEN bit.
6.
Wait for time, tPGS (minimum 5 s).