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| 型号： | MC68HLC98LJ12CFB |
| 厂商： | Motorola, Inc. |
| 英文描述： | Addendum to MC68HC908LJ12 |
| 中文描述： | 增编MC68HC908LJ12 |
| 文件页数： | 3/16页 |
| 文件大小： | 604K |
| 代理商： | MC68HLC98LJ12CFB |
HC908LJ12AD/D
MC68HLC908LJ12
MOTOROLA
Addendum to MC68HC908LJ12 Technical Data
For More Information On This Product,
Go to: www.freescale.com
3
Input current
IRQ
I
IN
—
—
±
1
μ
A
Capacitance
Ports (as input or output)
C
OUT
C
IN
—
—
—
—
12
8
pF
POR re-arm voltage
(7)
V
POR
0
—
100
mV
POR rise-time ramp rate
(8)
R
POR
0.02
—
—
V/ms
Monitor mode entry voltage (at IRQ pin)
V
HI
1.5
×
V
DD
—
2
×
V
DD
V
Pullup resistors
(9)
PTA0–PTA3, PTD4–PTD7 configured as KBI0–KBI7
RST, IRQ
R
PU1
R
PU2
—
—
25
27
—
—
k
k
1. V
DD
= 2.4 to 2.7 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted.
2. Typical values reflect average measurements at midpoint of voltage range, 25
°
C only.
3. Run (operating) I
DD
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than
100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run I
DD
.
4. Wait I
DD
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on
all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait I
DD
.
5. The 8kHz clock is from a 32kHz clock input at OSC1, for the driving the RTC.
6. LCD driver configured for low current mode.
7. Maximum is highest voltage that POR is guaranteed.
8. If minimum V
DD
is not reached before the internal POR reset is released,
RST
must be driven low externally until minimum
V
DD
is reached.
9. R
PU1
and
R
PU2
are measured at
V
DD
= 2.6V.
Table 2. DC Electrical Characteristics (2.4 to 2.7V) (Continued)
Characteristic
(1)
Symbol
Min
Typ
(2)
Max
Unit
Table 3. DC Electrical Characteristics (2.7 to 3.3V)
Characteristic
(1)
Symbol
Min
Typ
(2)
Max
Unit
Output high voltage (I
LOAD
= –1.0 mA)
All ports
V
OH
V
DD
–0.4
—
—
V
Output low voltage
(I
LOAD
= 0.8mA) All ports
(I
LOAD
= 4.0 mA) PTB2–PTB5
(I
LOAD
= 10.0 mA) PTB0/TxD–PTB1
V
OL
—
—
0.4
V
Input high voltage
All ports, RST, IRQ, OSC1
V
IH
0.7
×
V
DD
—
V
DD
V
Input low voltage
All ports, RST, IRQ, OSC1
V
IL
V
SS
—
0.3
×
V
DD
V
F
Freescale Semiconductor, Inc.
n
.
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