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参数资料
型号： MC705JJ7CDWE
厂商： Freescale Semiconductor
文件页数： 5/164页
文件大小： 0K
描述： IC MCU 8BIT 224B RAM 20-SOIC
标准包装： 38
系列： HC05
核心处理器： HC05
芯体尺寸： 8-位
速度： 2.1MHz
连通性： SIO
外围设备： POR，温度传感器，WDT
输入/输出数： 14
程序存储器容量： 6KB（6K x 8）
程序存储器类型： OTP
RAM 容量： 224 x 8
电压 - 电源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
数据转换器： A/D 4x12b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 20-SOIC（0.295"，7.50mm 宽）
包装： 管件
Core Timer
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
102
Freescale Semiconductor
10.2 Core Timer Status and Control Register
The read/write core timer status and control register (CTSCR) contains the interrupt flag bits, interrupt
enable bits, interrupt flag bit resets, and the rate selects for the real-time interrupt as shown in Figure 10-2.
CTOF — Core Timer Overflow Flag
This read-only flag becomes set when the first eight stages of the core timer counter roll over from $FF
to $00. The CTOF flag bit generates a timer overflow interrupt request if CTOFE is also set. The CTOF
flag bit is cleared by writing a logic 1 to the CTOFR bit. Writing to CTOF has no effect. Reset clears
CTOF.
1 = Overflow in core timer has occurred.
0 = No overflow of core timer since CTOF last cleared
RTIF — Real-Time Interrupt Flag
This read-only flag becomes set when the selected real-time interrupt (RTI) output becomes active.
RTIF generates a real-time interrupt request if RTIE is also set. The RTIF enable bit is cleared by
writing a logic 1 to the RTIFR bit. Writing to RTIF has no effect. Reset clears RTIF.
1 = Overflow in real-time counter has occurred.
0 = No overflow of real-time counter since RTIF last cleared
CTOFE — Core Timer Overflow Interrupt Enable Bit
This read/write bit enables core timer overflow interrupts. Reset clears CTOFE.
1 = Core timer overflow interrupts enabled
0 = Core timer overflow interrupts disabled
RTIE — Real-Time Interrupt Enable Bit
This read/write bit enables real-time interrupts. Reset clears RTIE.
1 = Real-time interrupts enabled
0 = Real-time interrupts disabled
CTOFR — Core Timer Overflow Flag Reset Bit
Writing a logic 1 to this write-only bit clears the CTOF bit. CTOFR always reads as a logic 0. Reset
does not affect CTOFR.
1 = Clear CTOF flag bit
0 = No effect on CTOF flag bit
RTIFR — Real-Time Interrupt Flag Reset Bit
Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR always reads as a logic 0. Reset does
not affect RTIFR.
1 = Clear RTIF flag bit
0 = No effect on RTIF flag bit
RT1 and RT0 — Real-Time Interrupt Select Bits 1 and 0
These read/write bits select one of four real-time interrupt rates, as shown in Table 10-1. Because the
selected RTI output drives the COP watchdog, changing the real -time interrupt rate also changes the
Address:
$0008
Bit 7
654321
Bit 0
Read:
CTOF
RTIF
CTOFE
RTIE
00
RT1
RT0
Write:
CTOFR
RTIFR
Reset:
00000011
= Unimplemented
Figure 10-2. Core Timer Status and Control Register (CTSCR)
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MC705JJ7CDWE 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC
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