参数资料
型号: MC74AC157MR2
厂商: ON SEMICONDUCTOR
元件分类: 编、解码器及复用、解复用
英文描述: AC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
封装: EIAJ-16
文件页数: 2/6页
文件大小: 102K
代理商: MC74AC157MR2
MC74AC157, MC74ACT157
http://onsemi.com
94
Figure 2. Logic Symbol
S
EI0a I1a I0b I1b
Zb
I0c I1c I0d I1d
Za
Zc
Zd
FUNCTIONAL DESCRIPTION
The
MC74AC157/74ACT157
is
a
quad
2input
multiplexer. It selects four bits of data from two sources
under the control of a common Select input (S). The Enable
input (E) is activeLOW. When E is HIGH, all of the outputs
(Z) are forced LOW regardless of all other inputs. The
MC74AC157/74ACT157 is the logic implementation of a
4pole, 2position switch where the position of the switch
is determined by the logic levels supplied to the Select input.
The logic equations for the outputs are shown below:
Za = E(I1aS+I0aS)
Zb = E(I1bS+I0bS)
Zc = E(I1cS+I0cS)
Zd = E(I1dS+I0dS)
A common use of the MC74AC157/74ACT157 is the
moving of data from two groups of registers to four common
output busses. The particular register from which the data
comes is determined by the state of the Select input. A less
obvious
use
is
as
a
function
generator.
The
MC74AC157/74ACT157 can generate any four of the
sixteen different functions of two variables with one
variable common. This is useful for implementing gating
functions.
Figure 3. Logic Diagram
I0a
I1a
I0b
I1b
I0c
I1c
I0d
I1d
E
S
Za
NOTE:
This diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
Zb
Zc
Zd
相关PDF资料
PDF描述
MC74AC174D AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
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MC74AC175DR2 AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
MC74ACT175DR2 ACT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
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相关代理商/技术参数
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