参数资料
型号: MC74ACT573DW
厂商: ON Semiconductor
文件页数: 5/12页
文件大小: 0K
描述: IC BUFF DVR TRI-ST OCTAL 20SOIC
产品变化通告: Product Discontinuation 27/Jun/2007
标准包装: 38
系列: 74ACT
逻辑类型: D 型透明锁存器
电路: 1:8
输出类型: 三态
电源电压: 4.5 V ~ 5.5 V
独立电路: 1
延迟时间 - 传输: 10.5ns
输出电流高,低: 24mA,24mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SOIC(0.295",7.50mm 宽)
供应商设备封装: 20-SOIC
包装: 管件
MC74AC573, MC74ACT573
http://onsemi.com
2
TRUTH TABLE
Inputs
Outputs
OE
LE
Dn
On
L
H
L
H
L
X
O0
H
X
Z
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before LOWtoHIGH Transition of Clock
Functional Description
The MC74AC573/74ACT574 contains eight Dtype
latches with 3state output buffers. When the Latch Enable
(LE) input is HIGH, data on the Dn inputs enters the latches.
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes. When
LE is LOW the latches store the information that was present
on the D inputs a setup time preceding the HIGHtoLOW
transition of LE. The 3state buffers are controlled by the
Output Enable (OE) input. When OE is LOW, the buffers are
enabled. When OE is HIGH the buffers are in the high
impedance mode but this does not interfere with entering
new data into the latches.
Figure 3. Logic Diagram
D
LE
Q
D
LE
Q
D
LE
Q
D
LE
Q
D
LE
Q
D
LE
Q
D
LE
Q
D
LE
Q
D1
D2
D3
D4
D5
D6
D7
LE
OE
O0
O1
O2
O3
O4
O5
O6
O7
D0
NOTE:
That this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
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